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Integrated microphone with CMOS circuits on a single chip

Posted on:1991-02-20Degree:Ph.DType:Dissertation
University:University of California, BerkeleyCandidate:Kim, Eun SokFull Text:PDF
GTID:1478390017452298Subject:Engineering
Abstract/Summary:
A miniature diaphragm microphone having sensitivity to acoustic signals at the level of conversational speech has successfully been integrated with CMOS circuits on a single chip. The microphone is built on 1.4 {dollar}mu{dollar}m thick LPCVD silicon nitride diaphragm (2 x 2 mm{dollar}sp2{dollar} in size) with electrodes and ZnO piezoelectric film to transduce mechanical deformation into electrical charge. The CMOS amplifier put next to the microphone on a single chip has a gain of 491, flat in audio frequency range with 3-dB frequency being 18 kHz. The total number of transistors integrated in an amplifier is more than 300. The amplified sensitivity of the integrated microphone with a gain of 491 is 1.5 mV/{dollar}mu{dollar}bar when excited by sound waves at 1 kHz with the sensitivity variation from 100 Hz to 20 kHz being approximately 9 dB. The integrated microphone has been fabricated through an interactive joint process between a commercial CMOS foundry and a university lab. It is the first to demonstrate an integration of a microphone with CMOS circuits on a single chip.; Theory of the integrated microphone has been developed through combining mechanics, piezoelectricity and circuit theory. Also developed are theoretical optimizations for sensitivity-bandwidth product and signal-to-noise ratio.; A new processing technique to align features on the front side of a wafer to those on its backside has been developed for bulk micromachining. A tiny (30 {dollar}mu{dollar}m-square and 1.6 {dollar}mu{dollar}m-thick) diaphragm serves as an alignment pattern. At the same time that the alignment diaphragm is made, much thicker, large-area diaphragms can be partially etched using "mesh" masking patterns in these area. The mesh-masking technique exploits the etch-rate differences between (100) and (111) planes to control the depths reached by etch pits in selected areas. The large, partially etched diaphragms (2 to 3 mm squares roughly 100 {dollar}mu{dollar}m thick) are sufficiently robust to survive subsequent IC-processing steps in a silicon-foundry environment. The thin alignment diaphragm can be processed through these steps because of its very small area. The partially etched diaphragms can be reduced to useful thicknesses in a final etch step after the circuits have been fabricated. This technique was successfully employed to fabricate microphones and on-chip CMOS circuits.
Keywords/Search Tags:CMOS circuits, Microphone, Integrated, Single chip, Diaphragm
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