| Innovation in semiconductor technology development is succumbing to cost and complexity. The task of designing and developing semiconductor processes remains largely a full custom approach. The fabrication processes are unstructured, with largely independent and often incompatible representations used by manufacturing and the variety of design tools. To meet the goal of shorter design cycles in semiconductor manufacturing, and to aid in the development of Technology Computer-Aided Design (TCAD) tools a unified computer interpretable semiconductor process representation is a goal.; Recent work on semiconductor process representation proposed a simple Object-Oriented model, in an architecturally closed system. This earlier work on semiconductor process representation using an object-oriented model has focused on a structure for representing the contents of semiconductor processing operations, such as unit steps for oxidation, lithography, deposition, diffusion, etc. The model chosen to take these processing operations and create a process was composition into simple sequential flows.; A simple sequential flow though is inadequate to capture the detail necessary to represent real manufacturing processes, or the experiments of the TCAD domain's virtual factory. In this work these limitations are overcome. Fundamental concepts needed to express flow control, including the provision for accommodating decision making, splits and joins, parallelism, and wafer management are presented. In addition, basic facilities that can be used by applications to navigate the process representation (the Navigator) including the selection of hierarchical granularity and appropriate steps of interest are presented. Concepts for an open architecture Object-Oriented Semiconductor Process Representation (OOSPR) are also presented. This architecture has evolved to meet the needs of a distributed application taking a client/server approach to the availability of an OOSPR.; A Process Simulation Environment, a demonstration of the concepts of this work is also presented. The Process Simulation Environment allows end to end process simulation; from mask capture through wafer-state visualization, on a distributed substrate. The Process Simulation Environment demonstrates both the representational concepts of flow control and the architectural issues presented.; Finally, future work in semiconductor process representation and application extensions are presented. |
