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On-chip characterization of charge-pump phase-locked loops

Posted on:1999-01-31Degree:Ph.DType:Dissertation
University:McGill University (Canada)Candidate:Veillette, Benoit RFull Text:PDF
GTID:1468390014968793Subject:Engineering
Abstract/Summary:
An all-digital technique for the measurement of the jitter transfer function of charge-pump phase-locked loops is introduced. Input jitter may be generated using one of three methods. They allow trade-offs between test clock frequency, hardware requirements and accuracy. All the methods rely on delta-sigma modulation to shape the unavoidable jitter quantization noise at high frequencies. This jitter noise is filtered by the lowpass characteristic of the device-under-test and has a minimal impact on the test results. For response measurement, the phase of the output signal is compared against a jitter threshold. As the stimulus generation and output analysis circuits are digital and do not require calibration, this jitter transfer function measurement scheme is highly amenable to built-in self-test. The technique can also be used to adaptively tune a PLL after fabrication. The validity of the scheme was verified experimentally with off-the-shelf components.
Keywords/Search Tags:Jitter
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