| The problem to be addressed in this dissertation is the development of a micropower CMOS active pixel sensor that dissipates two orders of magnitude less power than current state of the art CMOS image sensors and occupies only a few square milimeters in area. The resulting micropower camera on-a-chip would require so little power that it could be run on a watch battery.; In order to achieve design goals, a low-power low-voltage design methodology is developed and applied throughout the design process from system-level to process-level, while realizing the performance to satisfy the design specification.; As the first-generation low-power sensor, a micropower 176 x 144 CMOS APS with an on-chip 8-bit analog-to-digital converter (ADC) that operates at 20 frames per second (fps) from a 1.2 V power supply is implemented. The sensor core that includes the pixel array, row/column logic, analog readout, ADC, and biases, dissipates only 48 μW at 20 fps. Even with 1.2 to 3.3 V level-shifting I/O pads, overall dissipation remains below 1 mW. The sensor is implemented in 0.35 μm 2 P 3 M CMOS technology.; As the second-generation image sensor for a self-clocked image sensor, this sensor can be operated with only 3 pads (GND, VDD (1.2–1.7 V), DATAOUT). The measured power consumption of the overall chip with the internal 25.2 MHz on-chip clock (30 fps) at 1.5 V power supply is about 550 μW. We believe that this chip is the world's lowest power image sensor and the first image sensor designed for a watch battery operation. |
