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Modeling and mitigation of radiation-induced charge sharing effects in advanced electronics

Posted on:2013-04-15Degree:Ph.DType:Dissertation
University:University of Southern CaliforniaCandidate:Haghi, MahtaFull Text:PDF
GTID:1458390008968644Subject:Engineering
Abstract/Summary:
As semiconductor industry continues to scale down to ever smaller feature sizes, radiation-induced soft errors are becoming a major concern for microelectronics reliability. A rising problem of a single particle strike causing upsets in more than one circuit node has become more frequent in deep sub-micron technologies. This is especially a troubling trend since most already existing single-event effect mitigation techniques for older technologies are based on the assumption of corruption of data in a single node. However, in deep sub-micron technologies, charge sharing and collecting among multiple nodes due to a single hit has invalidated the above assumption. Therefore, if sub-micron electronic circuits are targeted to be used in radiation sensitive environments, they have to be hard to charge sharing and collecting in addition to other single-event effects. This magnifies the necessity of charge sharing mitigation methods and prior to that a fast and accurate model to measure the sensitivity of adjacent nodes to charge sharing effects. After assessing the vulnerability of a circuit to charge sharing, appropriate mitigation techniques can be applied to reduce the induced error rate. We have developed a semi-empirical circuit model to predict the charge sharing effect between adjacent nodes. This is a fast and easy-to-use model with good accuracy that can be applied to circuit simulators at early stages of a design. The effectiveness of the proposed model is demonstrated by comparing the model with Technology Computer Aided Design (TCAD) simulation results for 65-nm CMOS technology.;PFET devices are more prone to charge sharing than NFET devices due to PNP bipolar amplification; therefore removing them can reduce the charge sharing effect. Thus the use of MOS Current Mode Logic (MCML) circuit topology, which is comprised of all NFET devices, can reduce the charge sharing effect for deep sub-micron technologies in radiation sensitive environments. We study the sensitivity of a MCML sequential element to single-event upsets and propose a Radiation-Hardening-by-Design (RHBD) method to mitigate single-event upsets for MCML sequential elements. We also suggest layout and process techniques to reduce charge sharing effects and compare the effectiveness of existing charge sharing mitigation methods in deep sub-micron CMOS technologies.;Another growing radiation-induced problem in the deep sub-micron technologies is an induced single event transient (SET) pulse due to a single strike in combinational logic. Smaller noise margins due to reduced voltage supplies and higher operating frequencies in deep sub-micron technologies have made circuits more sensitive to SET errors. We have proposed a RHBD method to mitigate the SET problem in 65-nm CMOS technology with minimum area and delay penalties.;Finally, we also initiated an investigation on the radiation effects on electronics in aligned carbon nanotube technology, one of the most promising post-silicon technologies, by using 3D-TCAD simulations.
Keywords/Search Tags:Charge sharing, Radiation, Deep sub-micron technologies, Model, Mitigation, Technology
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