| To continue the performance improvement in designing real-time portable embedded systems, three issues must be solved: the gap between the increasing processing power and the available battery-energy; the predictability required by the real-time behavior of applications; and the speed gap between processors and memories. It has been widely observed that 50%-75% of the power consumption in embedded multimedia systems is the consequence of memory accesses. Therefore, the responses to the three issues, the battery gap, the predictability and the memory wall, could actually converge into one answer---the efficient utilization of software-managed memories.; Although there is no "ideal" polynomial-time solution to general memory management problems, most embedded applications are dedicated to voice, image and video processing, exhibiting very regular computations for possible analytical means. In the dissertation, we focus on the memory access optimization for embedded multimedia applications. We notice that those applications are data flow intensive, whereas data streams cannot be abstracted in traditional loop models concerned only about execution and data dependence. To overcome the shortcoming, a novel loop representation model, xMDFG (eXtended Multi-dimensional Data Flow Graph), is proposed where data streams are aligned and connected with the computation domain, instead of being abandoned.; In order to take advantage of data locality without violating execution legality, we propose a stream-conscious tiling exploration technique based on the subscript function. The approach exhibits notable improvements in reducing memory access and minimizing communication cost. Since memory access, especially external memory access, makes a prominent contribution towards system level power consumption, this idea is further extended for the purpose of energy reduction with moderate modifications. Both of the two approaches are verified on TI's low power C55X DSP.; Embedded multimedia systems are often designed as SoCs, where either the custom IP designs (as hardware cores), or the CPU coding (as software core), significantly impact data localities and communication demands. To tackle this issue, we improve traditional loop transformation techniques by rescheduling multiple loop nests oriented on data streams. The case study on JPEG 2000 exhibits remarkable improvements in memory access efficiency, overall throughput, and system scalability. The ideas in this dissertation can be incorporated into a preprocessor or optimizing compiler for embedded multimedia systems. |
