Electrostatic discharge protection and measurement techniques for radio frequency integrated circuits

Electrostatic discharge (ESD) can destroy integrated circuits (IC) in manufacturing and assembly processes. To keep the yield high, mass produced integrated circuits must be protected against ESD events. Traditionally, this is done by adding ESD protection devices at each pad of the IC. However, the parasitic capacitance associated with the ESD protection device can be detrimental to the performance of an RF circuit operating at high frequency.; This research concentrates on tuned ESD protection techniques that can be used to provide ESD protection to narrow band RF circuits without significantly affecting the RF performance. The techniques rely on tuning out the parasitic capacitance at the operation frequency of the RF circuit. In order to use the technique effectively, the quality factor of the protection device should be maximize, and in this research, several protection devices available in SiGe and CMOS processes are compared with an emphasis on their capacitance and quality factor.; The tuned protection techniques are tested by designing several ESD-protected low-noise amplifiers (LNA), operating at frequencies as high as 5 GHz. Record breaking ESD protection levels are demonstrated, while the impact of the protection circuitry on RF performance is negligible. As a special case, the technique is extended to protect a dual-band LNA.; In this research, ESD measurement techniques are also addressed. Two conventional ESD measurement systems are modified to improve the measurement capability for RF circuit characterization. One of the new measurement systems is capable of detecting ESD failures in RF circuits with an improved sensitivity. The second new measurement system has a significantly higher measurement bandwidth and dynamic range, improving the characterization ESD protection devices used to protect against very fast ESD events.