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2-channel time-interleaved second order sigma-delta modulator in 0.18mum CMOS

Posted on:2006-01-16Degree:Ph.DType:Dissertation
University:The University of Texas at DallasCandidate:Lee, Kye-ShinFull Text:PDF
GTID:1458390008461526Subject:Engineering
Abstract/Summary:
A 2-channel time-interleaved 2nd order sigma-delta modulator is realized based on a novel time-interleaved scheme which can overcome the limitations of the conventional approach. The original 2-channel time-interleaved structure was further optimized to reduce the hardware complexity. As a result, the 2-channel 2nd order sigma-delta modulator can be implemented using only 2 op-amps and 2 quantizers, whereas still maintaining the 2nd order noise shaping characteristic. The prototype chip was fabricated in 0.18mum CMOS technology which showed a 13-bit resolution and a 14-bit dynamic range up to signal band of 1.1MHz with total power consumption of 5.4mW.
Keywords/Search Tags:Order sigma-delta modulator, 2-channel time-interleaved, 18mum CMOS
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