A 2-channel time-interleaved 2nd order sigma-delta modulator is realized based on a novel time-interleaved scheme which can overcome the limitations of the conventional approach. The original 2-channel time-interleaved structure was further optimized to reduce the hardware complexity. As a result, the 2-channel 2nd order sigma-delta modulator can be implemented using only 2 op-amps and 2 quantizers, whereas still maintaining the 2nd order noise shaping characteristic. The prototype chip was fabricated in 0.18mum CMOS technology which showed a 13-bit resolution and a 14-bit dynamic range up to signal band of 1.1MHz with total power consumption of 5.4mW. |