| Mixed-signal system design is a complex task with many levels of deliverables, including layout, schematics, simulation results, functional models, design specifications, and process design kits. The ability to create mixed-signal design content has lagged behind digital design for decades, largely because the digital methodology has been able to make efficient use of design abstraction and implementation automation. In this work, we argue that such abstraction methods are a form of a model driven architecture (MDA) process, which could be applied to mixed-signal design at a number of levels to create the next generation of mixed-signal design flow. To illuminate this point, we have created a novel translation engine to generate deliverable content in an automated manner from an abstraction of the desired content.; We show two implementations of this MDA process. One is the creation of a process design kit (PDK) for mixed-signal electronic design automation (EDA) toolsets. As the element that interfaces the EDA toolset with the fabrication process, the construction of the PDK fills a critical role in the design process. The time-saving enhancements added to the PDK improve design efficiency and decrease time-to-market (TTM). However, creating the proper PDK files to implement various enhancements is a time-consuming task. We propose a novel method in which these improvements could developed once, then have portability to any fabrication process. This mechanism provides a direct path for PDK construction reuse between processes. In fact, the fabrication process information is also portable between EDA toolset within our developed methodology.; The second implementation is the translation of design topologies into analog hardware description language (AHDL) models, corresponding to designed schematics of appropriate topology. The topology and some performance metrics are indicated, and the AHDL model is customized and created, including intra-module wiring, by the novel translation engine shown in this work. This second example fits into a larger mixed-signal design process where the schematic topologies are automatically optimized for performance using design goals and carefully constructed test benches, layout is generated in an automated fashion using tagged schematic topologies, and the complexity of verification requires the use of AHDL models. The EDA toolsets available to optimize topologies and automate layout offer methods of abstracting design intent within the tool framework to enable intellectual property (IP) capture and reuse. We further that intent with our translation engine and offer additional abilities to build libraries of reusable design content, to organize these libraries for easy access, and to abstract design intent for automated reuse. |
