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Study On The Trap Characteristics And Gate Oxide Reliability Of 4H-SiC MOS Structure

Posted on:2019-12-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:Y F JiaFull Text:PDF
GTID:1368330575480704Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As a typical third-generation semiconductor material,4H-SiC has many advantages such as wide band gap,high critical breakdown electric field,high electron saturation speed and high thermal conductivity.It is very suitable for preparing high-temperature,high-voltage,high-power and radiation-resistant power electronic devices.In the silicon carbide power device family,4H-SiC MOSFET has the advantages of high working frequency,low switching loss,low on-resistance and high current density,which will gradually replace the Si based IGBT and improve the switching frequency and overall efficiency of power electronic system,making the cooling requirements of the equipment reduced.However,due to the existence of a large number of traps in the 4H-SiC MOS structure,the fabricated 4H-SiC MOSFET power devices still face two major problems:low channel mobility and poor gate oxide reliability,which has become an important obstacle to its further development.Therefore,it is necessary to study the characteristics of various types of traps and the reliability of gate oxide in 4H-SiC MOS structure.In this paper,the effects of different oxidation and passivation processes on the various types of traps and gate oxide have been studied theoretically and experimentally.The main research contents and innovative results are as follows:1)The main electrical properties of various traps were studied,and the effects of different traps on the main performance parameters of 4H-SiC MOSFET power devices were analyzed.Based on the characteristics of 4H-SiC materials,a method of a phased voltage stress matching with ultraviolet light radiation was developed to directly extract the density of hole traps in slow states for N type 4H-SiC MOS capacitors,which provides a convenient and reliable evaluation method for further exploring hole traps in N-type 4H-SiC MOS capacitors.2)The effect of different thermal oxidation temperatures on 4H-SiC MOS capacitance was studied.The effects of different oxidation temperatures on various types of traps,fixed charges and the integrity of gate dielectric in MOS capacitors were contrastively studied,and the mechanism of improving the electrical properties of 4H-SiC MOS capacitors by high temperature thermal oxidation process was analyzed.The results show that the interfacial state density near the bottom of the conduction band,the near interface trap density in the transition layer and the fixed charge with negative charge in the oxide layer are decreased with the increase of the temperature of the thermal oxidation process.Under the condition of oxidation at 1350?,the interfacial state density below the bottom of the conduction band of 0.2 eV is only 3×1011 cm-2eV-1 extracted from conductance method.3)The influence of NO annealing passivation process on the reliability of 4H-SiC MOS capacitor gate oxide was studied.The effect of NO annealing on the positive and negative flat band voltage stability of MOS capacitor was studied by using time-dependent voltage stress and ultraviolet light measurement.The changes of electrical properties of MOS capacitor samples at different test temperatures were investigated.The micro-mechanism for improving the capacitance characteristics of 4H-SiC MOS by NO annealing process is analyzed,and the passivation mechanism of NO annealing is verified by simulation.The results show that NO annealing can effectively reduce all kinds of electron traps in 4H-SiC MOS structure and introduce a large number of additional slow state hole traps.The density of slow hole trap extracted from NO annealed samples by using voltage stress and ultraviolet radiation is 4?6 times the value of Ar annealed samples.Once the positive charge is trapped,it is difficult for the slow state hole trap to be released quickly in a short time.It will seriously affect the negative stability of threshold voltage for 4H-SiC MOSFET power device.4)Using N and P type 4H-SiC MOS capacitors,the effects of different NO annealing processes on electron and hole traps were studied,and the optimization scheme of NO annealing process is suggested.The effects of different NO annealing conditions on the content of N element at the interface were compared.With the increase of NO annealing temperature and annealing time,the content of N element(area density)near the interface increases gradually,and the surface density of N element in N-type sample is about 1.3 times of that in P-type sample.The N element introduced by NO annealing will produce a deep level interface trap in P-type 4H-SiC MOS capacitors,which is about 0.5?0.6 eV above the top of the 4H-SiC valence band.There is a strong positive correlation between the amount of N element and the content of N element at the interface.5)A sample of 4H-SiC MOS capacitor passivated by nitrogen and phosphorus was proposed and prepared.A new type of nitrogen and phosphorus mixed passivation technology was developed.The thermal oxidation process of this method contains both N and P elements.The content and distribution of P element in the sample were found out,and the effect of introducing appropriate amount of P element in SiO2 on trap and gate oxide integrity in MOS structure was analyzed.The results show that after sacrificial oxidation of P implanted layer on 4H-SiC epitaxial surface,about 60%of implanted P elements remain in the grown SiO2 film,and its distribution runs through the whole SiO2 film to the interface,and the concentration in SiO2 is basically uniform,about 4×1019 cm-3.It is found that the mixed passivation of nitrogen and phosphorus can eliminate the near interface electron traps in 4H-SiC MOS structure almost completely,but at the same time,more slow state hole traps are introduced.6)The influence of barium oxide passivation on the interface characteristics and the effect of different annealing conditions on the passivation effect of barium oxide were studied.The distribution and existence of Ba elements in the sample were investigated.The micro-mechanism of barium oxide transition layer to improve the interface characteristics is analyzed and the passivation mechanism of the transition layer containing barium oxide is verified by simulation.The results show that passivation treatment using barium oxide can effectively reduce the electron trap in 4H-SiC MOS structure,improve the interface quality of 4H-SiC/SiO2,the stability of flat band voltage,and the integrity of gate dielectric,therefore,reduce the gate leakage current.Annealing in N2+O2 environment can enhance the improvement effect more effectively.
Keywords/Search Tags:4H-SiC MOS structure trap, gate oxide reliability, high temperature oxidation, NO annealing, nitrogen and phosphorus mixed passivation, barium oxide passivation
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