Research On Soft Error Sensitivity Evaluation And Mitigation Technology Of Nano Integrated Circuits

Integrated circuits(ICs)are the core components of aerospace electronic systems.ICs working in space environment may cause single event effect due to particle strike,which may lead to performance degradation and even functional failure of the system.Therefore,it is significant for space missions that to research the evaluation and mitigation technology of soft error sensitivity of ICs.With the development of IC technology into nano-era,some new phenomena and effects make it difficult to apply the traditional soft error sensitivity evaluation approaches and mitigation techniques for large-size devices and circuits.Classical double exponential current source plays an important role in soft error sensitivity evaluation of micron-scale and deep submicron ICs.However its applicability is weakened in nano-scale evaluation.Single event transient pulses gradually develop into multiple transient pulses at nanolevel,which brings new challenges to the evaluation and mitigation of soft error sensitivity of ICs.In addition,with the development of three-dimensional(3D)integration technology,3D IC may play an important role in space application environment with strict requirements for volume and performance.Therefore,it is necessary to research on soft error sensitivity evaluation of 3D IC.In this paper,several key issues of soft error sensitivity evaluation and mitigation technology for nano-scale digital ICs are studied.The main research contents include:(1)Research on modeling of single event transient pulse in nano-integraed circuits.Soft error sensitivity evaluation of ICs is the basis of reliability design.In order to improve the accuracy of the evaluation,it is necessary to model the pulse induced by particle strike.Bipolar amplification effect in nano-integrated circuits has an important influence on charge collection,and then influence the formation of transient pulses.By analyzing the carrier transport process in bipolar amplification effect,a calculation method of charge collection considering bipolar amplification effect is proposed in this paper.Then,by analyzing the prompt charge collection process and the sustained charge collection process,a composite double exponential current source model is established.It can effectively simulate the "plateau" effect of single particle transient pulse in nano-integrated circuits.The composite double exponential current source model can be applied to fault injection simulation in circuit level.It can effectively and accurately evaluate the soft error sensitivity of nano-scale digital ICs.(2)Research on single event multiple transient soft error sensitivity evaluation approach based on cell layout information.With the continuous development of IC technology,the charge generated by a single particle strike may be collected by multiple sensitive nodes due to charge sharing mechanism.This results in the generation and propagation of multiple transient pulses in combinational logic circuits.It is difficult to obtain the fault pattern of multiple transient pulse.This paper presented an approach to evaluate the soft errors ensitivity of single event multiple transient by analyzing layout information of cells.By establishing sensitive volume simulation model based on cell layout information and running Geant4 Monte Carlo simulation,composite double exponential current source model is used in fault injections.A fast SPICE simulation tool is used to conduct circuit level simulations.Compared with the related evaluation methods,this approach can deal with the multiple transient problem while considering the positions of the logic cell layout.It can be used to evaluate the single event multiple transient soft error sensitivity of nano-integrated circuits.(3)Research on single event multiple transient soft error sensitivity evaluation approach based on analytical model and mitigation technology.Firstly,a single event multiple transient soft error sensitivity evaluation approach based on analytic model is implemented.The pre-processing technology of pulse generation and propagation characteristics based on standard cell library are used.The electrical masking,logical masking and latch window masking effects of the circuit are considered.The convergence of multiple transient pulses is solved by propagating multiple transient pulses independently and then conducting logic operation.Gate sizing technology is an effective approach for mitigating soft error sensitivity in gate level circuits.Multiobjective particle swarm optimization(MOPSO)algorithm is an important swarm intelligence algorithm.In this paper,the single event multiple transient soft error sensitivity evaluation approach based on analytic model is used as evaluation means.The gate sizing technology is used as mitigation scheme.The multi-objective particle swarm optimization algorithm is used as optimization strategy.Finally,the soft error sensitivity of combinational logic circuits is optimized at a certain overhead.Compared with the related mitigation and hardening technologies,this approach can optimize the soft error sensitivity of the circuit with limited overhead.(4)Research on 3D SRAM soft error sensitivity.By changing planar integration into three-dimensional stacked structure,3D integration technology can enhance the transistor density.Due to its high bandwidth,high density,low latency,and low power,3D integration technology is expected to be used in aerospace systems where area and performance are strictly limited.This paper takes 3D SRAM as the research goal.By using TCAD device-level simulation and considering related technology,3D SRAM soft error sensitivity evaluation model was established.The single event upsets of 3D SRAM under different particle types and energies is studied.The differences of cross-sections of different tiers in the stacked structure were presented.In addition,the impacts of through-silicon vias(TSVs)on the soft error sensitivity of 3D SRAM are analyzed by building a simulation model with TSVs.TSVs is the most common technology for interconnecting different tiers.The simulation results show that high energy ions can pass through the 3D SRAM simulation model and increase the cross sections of each tier.However,low energy ions can not affect the cross section of the bottom tier due to its stopping range.