Research And Implementation Of Automatic Gain Control Circuit For Short Range Wireless Recievers

Automatic Gain Control (AGC) is used to enlarge the dynamic range of a RF receiver. A RF receiver with AGC just need a 6-8 bit Analog-to-Digital Converter (ADC) to digitize received signals. As a consequence, some operations such as image rejection,post-filtering and demodulation can be realized in the digital world with more accuracy and more flexibility. Short range wireless communication techniques rising with the development of Internet of Things generally adopt burst mode for communications, and require fast AGC settlings. Therefore, AGC in a short range wireless receiver has its structure restricted, which brings in many challenges in designing a high performance AGC. Digital signal operations are becoming more and more appealing to a RF receiver with the rapid developments in CMOS process technologies, however, attendant shrink in supply voltage is bringing in more and more difficulties as well.The upper limit of the dynamic range of a receiver is mainly determined by the linearity of AGC amplifier. In the view of system structure, the key is to what extent the linearity of PGA can be developed in an AGC structure.Besides, in view of function cell, how linear PGA is determines the available linearity of AGC amplifier.Focused on the application of short range wireless receivers, this dissertation is unfolded from two aspects: the structure of fast-settling AGC, and circuit design of high linearity PGA. The main innovations are concluded below.(1) A novel AGC structure consists of a logarithmic-detector-based feedforward stage and a sampled data feedback stage is proposed. The high dynamic range of logarithmic-detector is utilized to achieve fast settling and to make a good use of high linearity PGA, because the numbers of FGAs and of switches are both minimized.Besides, the received signal strength indicator (RSSI) function is accessible to proposed AGC structure.(2) The model of high linearity transconductance-transimpedance PGA is built. This model not only can be used to interpret the reason of gain peakings, but also uncovers the nonlinearity sources of the Gm stage. As a result,a novel PGA with improved linearity is proposed. An adaptive control circuit is used to restrain the relative small signal parameters' dependence on the input. The goal of linearity improvement and that of none gain peaking are imtegrated in proposed method. The CM input voltage range (CMIVR) is extended as well. The test results show that the OIP3 of PGA reaches 35 dBm,and the CMIVR increases by 200 mV compared to that of traditional one.(3) The master-slave control technique is used to suppress the CM components in OCA. With this method, the high output impedance of current source can be maintained although there is no enough drain-source voltage. A high linearity PGA based on this OCA is designed under the supply of 1.2 V. The simulation results show a 26 dBm OIP3 and a constant 55 MHz bandwidth when driving a capative load of 2 pF.(4) The research of logarithmic detector contains two parts: the master-slave control and the translinear loop are separately used to compensate the temperature-process variations of CMOS logarithmic converters, the latter of which is proved to contribute a CMOS logarithmic converter with less than 350 ppm temperature coefficient. The successive detection logarithmic amplifier is interpreted in the view of how the detection range of rectifier is extened by FGA. Then the nonideality is analyzed, and the rule of designing a successive detection logarithmic amplifier is concluded as well. Besides, low power circuit implementations of FGA are also explored.Based on above researches, a high performance AGC for BLE receiver is designed and implemented in 0.13?m CMOS process. The test results show that the AGC settles up in 6 ?s, 0—72 dB gain range with 2 dB step can be provided, the OIP3 of the designed AGC amplifier reaches 19 dBm and 28 dBm at the highest / lowest gain settings,respectively. In addition,63 dB RSSI is provided. The whole circuit draws a total current of about 1.1 mA from the supply of 1.2 V, however, the BLE receiver shows a dynamic range of 60 dB (0.1% BER).