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Study Of Readout Integrated Circuits For 640×512 IRFPAs

Posted on:2018-03-16Degree:DoctorType:Dissertation
Country:ChinaCandidate:Q H LiangFull Text:PDF
GTID:1318330536962204Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The Infrared detection technology is developing rapidly towards farther detection distance,higher target identification ability,faster frame rates and lower power dissipation and cost.So in order to improve the detection and identification distance,it's necessary to improve the spatial resolution.Large scale and high integration infrared focal plane array(IRFPA)is not only the core of high spatial resolution imaging but aslo the frontier field of infrared detection technology.With the increase of IRFPA integration and the reduce of pixel pitch,detector and readout integration circuit(ROIC)design will face a great challenge.The saturation charge capacity,noise,power dissipation that are ROIC key performance will be affected,especially the saturation charge capacity,which has a serious influence on the dynamic range and signal-to-noise ratio of photoelectric system.In this paper,the research on a 640×512 IRFPAs ROIC with 15?m pixel pitch is carried out,which aims at the technical difficulties of realizing large charge capacity in the small pixel pitch ROIC.The circuit proposes a technology method of 2 by 2 pixels sharing an integration capacitor which breaks the design limit of unit charge capacity,thus the maximum effective charge capacity can reach 20Me~-/pixel.The odd and even line interlaced readout mode can slove effectively the problem of low frame rate that method brings,at the same time the adjacent columns can share an output bus,thus the numbers of column buffers are reduced half and power consumption can reduce accordingly.Moreover,the adjustable current bias circuits,which adopts the design idea of the combination of the current mirror and voltage bias control,have been designed for the analog transfer chain ciruit and can be convenient to practical use in different occasions.The outdriver can realize rail to rail input,and achieve the 10 MHz read rate.The chip is designed and fabricated with CSMC 0.18?m 1P4 M 3.3V CMOS process technology.And the chip has been tested under both the room temperature and cryogenic environment coupled with the HgCdTe IR FPAs and imaging about the IRFPA,and the performance of IRFPA have been evaluated.The test results show that the circuit can work well under 77 K temperature.The output swing is 1.45 V,and the maximum effective charge capacity can reach 20.60Me~-/pixel,which can satisfy the requirement of the new method.The RMS noise of IRFPA is 0.53 mV and the dynamic range is 68.74 dB.Other performance parameters generally meet the present requirements of circuit design and an improved scheme is proposed about the flaws of design.A 640×512 IRFPAs ROIC with 30?m pixel pitch under SW background is presented simulaneously in this paper.The simulation and discussion are made for the analog signal transfer chain working in the default mode.The chip has been fabricated with CSMC 0.5?m DPTM CMOS process technology.And the chip has been tested under both the room temperature and cryogenic environment coupled with the IRFPAs,and the performance of IRFPA have been evaluated.The test results show that the circuit can work well under 77 K temperature.The output swing is 2.4V,the readout rate is 10 MHz and the circuit can make selectable 0.45Me~-/3.00 Mecharge capacity.The RMS noise of IRFPA is 0.76 mV,the dynamic range is 69.98 dB and the NETD is 30 mK,so performance parameters can meet the requirements of project.Moreover,the research on 15?m pixel pitch ROIC under SW background is carried out based on CSMC 0.18?m 1P5 M 3.3V process technology,which is made some simulations.However,the simulation results show that the circuit module design could be optimized because the change of the process and the decrease of the power supply voltage will affect the working state of some circuit modules.The results of this study can be suitable for different application backgrounds and different bands of IRFPAs and provide the theory and practice experience for a larger array and smaller pixel pitch readout circuit design,and have practical application value about the development of the new generation IRFPA and the enhancement of the signal-to-noise ratio and dynamic range of infrared system.
Keywords/Search Tags:IRFPA, 15?m pixel pitch ROIC, charge capacity, 2 by 2 pixels sharing method
PDF Full Text Request
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