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Research Of PIN Based IMOS And TFET Devices

Posted on:2014-01-26Degree:DoctorType:Dissertation
Country:ChinaCandidate:Y C LiFull Text:PDF
GTID:1268330431459594Subject:Microelectronics and Solid State Electronics
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With the continuous development of Integrated circuit(IC) technology, challengesresulting from short channel effects, parasitic effects and quantum tunneling make itincreasingly difficult for conventional microelectronic technology to fulfill the demandof sustaining progressing of IC technology node, and especially the increasingly seriousproblem of energy consumption has been the greatest bottleneck in continuing Moore’sLaw. Therefore, PIN based IMOS and TFET devices have become a hot topic that tosolve the problem of the power constraints countered in the development of integratedcircuits.IMOS and TFET are attractive new principle devices for low-power, high-speed,and high-performance applications due to their steeper subthreshold swing. However,some important issues exist in the aspect of operating mechanism, electricalcharacteristic and physical modeling. This paper focuses on the operating mechanism,threshold voltage model, performance optimization and new devices structure of PINbased IMOS and TFET devices. The major research work and results are as follows:1) The operating mechanism and electrical characteristics of IMOS and TFEThave been investigated. Based on the analysis of the basic characteristics of PINstructure, the operating mechanism and electrical characteristics of IMOS and TFEThave been investigated by using TCAD tools. The results show that, a) the IMOS deviceuses modulation of the avalanche breakdown voltage of PIN diode by gate voltage inorder to switch from the off state to the on state and vice-versa; b) the TFET device usesmodulation of the band to band tunneling transmission between the source and theI-region by gate voltage in order to switch from the off state to the on state andvice-versa.2) The physical based threshold voltage models of IMOS and TFET have beeninvestigated. Based on the operating mechanism of IMOS and TFET, threshold voltagemodel of SOI IMOS, nanoscale SOI TFET and nanoscale DG-TFET is developed usingsolving the electrical potential and electric field of different regions. By analyzing themodel, the dependence of threshold voltage on the gate length, gate dielectric, Si filmthickness and drain voltage is studied. The results from the models show excellentagreement with the simulations data. The proposed models can be used to guide thedesign, simulation and fabricate of IMOS and TFET. 3) The influence of structure parameters on the performance optimization ofIMOS and TFET has been investigated. IMOS and TFET optimization is explored usingTCAD tools, considering the structural parameters and source-drain bias. The resultsshow that, a) by thinning gate dielectric layer, increasing gate dielectric permittivity,Lg/Lin ratio and source-drain bias, electrical characteristics of IMOS device can begreatly improved. b) by using double gate structure, increasing gate dielectricpermittivity, higher source region doping, lower drain region doping and thinner Si layer,the on current and subthreshold swing of TFET device can be greatly improved.4) New IMOS and TFET structures named SSOI IMOS and SSOI TFET areproposed and investigated. A Silicon-based IMOS and TFET suffer from a higher biasvoltage and a lower on current. The strained silicon technology has been introduced inIMOS and TFET for overcoming their shortcomings. SSOI IMOS and SSOI TFET areanalyzed and verified using TCAD tools. The results show that bias voltage of IMOScan be reduced and on current of TFET can be enhanced by using strainedsilicon technology.5) A new TFET structure named PNIN/PIPN SSOI TFET is proposed andinvestigated. Considering the influence of “doping project” on the impact of tunnelingprobability, the N+or P+region has been introduced in SSOI TFET, named PNIN/PIPNSSOI TFET device. The PNIN SSOI TFET is analyzed and verified using TCAD tools.The results show that, the use of N+region realized optimized subthreshold swing andthreshold voltage and enhanced Ion/Ioffratio. In addition, with the appropriate increaseof the inserted N-layer doping concentration and the layer length, the characteristics ofthe device is improved.In conclusion, the quantitative theoretical analyses of IMOS and TFET are takenthrough numerical simulation and modeling methods to basic mechanism problems inthis dissertation. Then, several novel IMOS and TFET structures are proposed andstudied on the device characteristics for their shortcomings. A lot of meaningful resultsare obtained and the guidelines for the IMOS and TFET are presented in thisdissertation.
Keywords/Search Tags:PIN diode, IMOS, TFET, Strained Si, Subthreshold swing
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