Design On Hybrid Circuits Of Ultra-steep Subthreshold Swing Devices And CMOS

With the development of the Io T industry,the demand for ultra-low power devices is increasingly strong.TFET is one of the most promising ultra-low power devices due to its ultra steep subthreshold swing.However,there are still some defects of TFET,such as on current and bipolar current.In general,TFET and CMOS are used to overcome the defects and achieve ultra-low power consumption.The hybrid circuit is explored from two aspects: TFET-CMOS hybrid cell circuit and memory circuit.However,voltage range of the designed hybrid logic circuits are limited.Firstly,a hybrid logic circuit is designed to achieve lower leakage current and circuit delay.Secondly,a new read-write separation nvSRAM is proposed,which greatly reduces the static energy consumption,delay of writing,energy of writing and EDP.The disadvantage of this hybrid nvSRAM is that the operation delay of SRAM is much longer than that of traditional circuits.To meet the performance requirements and ensure ultra-low static power consumption,an 1kb TFET-CMOS hybrid memory is designed.The hybrid memory sacrifices area for the improvement of static energy consumption and EDP.The simulation results show that the static power consumption of the hybrid logic circuit with SMIC 55 nm process library and TFET model is reduced by nearly 50% compared with the traditional CMOS logic circuits.In addition,The delay of the hybrid logic circuit is 70% less than that of TFET logic circuits,which greatly improves the circuit performance.The leakage current of the new hybrid nvSRAM is two orders of magnitude lower than that of the traditional circuit,and the EDP of MTJ storing phase is reduced by nearly 50%.The hybrid memory reduces the static power consumption to 77 nw and ensures the operation speed of 30 MHz.Compared with traditional CMOS memory,EDP of hybrid memory is reduced by at least 25% and static power consumption is reduced by 67%.It is indicated in the result that the hybrid circuits designed in this paper have good applicability in the ultra-low power application of Internet of things devices.