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Study On Power Semiconductor Devices Of Smart Power Integrated Circuits

Posted on:2014-01-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:J J ChengFull Text:PDF
GTID:1268330425468625Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Power electronics is the most advanced technology of electrical energytransformation so far. It can efficiently transform electrical energy from one formfacilitating transmission to another one meeting application needs. Thus powerelectronics is of both great flexibility and high efficiency, and closely matches thetendency of energy conservation and environment protection nowadays.As a new generation of power electronic technology, Smart Power IntegratedCircuits (SPICs) aim at the integration of high-voltage power devices and low-voltagecontrol drivers and protection circuits. Not only can the technology enhance the chipoverall performance, but also it can reduce production cost, further achieving highefficiency of electrical energy transformation and intellectualization. To be morespecific, the core technical points include design of power semiconductor devices inintegrated circuits, as well as isolation and integration with low-voltage parts.Therefore, Prof. Xingbi Chen proposed the theory of OPTimum Variation LateralDoping (OPTVLD), which can optimize the surface lateral voltage-sustaining structureto achieve a surface breakdown voltage as large as possible within possibly minimizedlateral length. Based on this theory, Prof. Xingbi Chen invented a novel smart powertechnology, which is compatible with common CMOS and/or BiCMOS process, tointegrate high-side and low-side high-voltage devices, as well as all the High-VoltageIntegrated Circuits (HVIC) into a single chip. This technology breaks the technicalbottleneck of requiring high-cost isolation process, and makes it possible for researchunder domestic environment, which has a positive meaning for the whole powerelectronics.In order to promote the aforementioned advantage of the invention, a series ofnovel power semiconductor devices and terminal structures based on OPTVLD theoryare studied in this thesis, in terms of theoretical analysis, simulation and experiment.The results not only can be used for further optimization of SPICs, but also can providereference for the improvement of power semiconductor separate devices.The original works are embodied from Chapter3to Chapter6, the content ofwhich are listed as below:1. By taking high-side devices using P-LDMOS as a reference, a double-paths OTPVLD P-LDMOS structure is proposed. Traditionally, N-LDMOS are used as bothhigh-side and low-side devices, and the driver circuits are respectively needed for them.Therefore, such as signal-delaying circuit and high-voltage level shifter should be addedfor convenience of control. On the other hand, with high-side P-LDMOS, the drivercircuits on both sides can be united, resulting in higher density of integration and lowermanufacture cost. However, as is known to all, electrical conductivity of P-LDMOS iscomparatively weak, thus larger area is required to achieve the same performance whencompared with N-type one. The proposed double-paths P-LDMOS structure, whoseelectrical conductivity is proved to be as good as N-LDMOS, is quite suitable for SPICsas high-side power devices.2. A new structure of low-side power devices is proposed and experimented.Traditionally, low-side power devices only use lateral MOS, but if it can be designed byparalleling vertical and lateral cells, chip area can be correspondingly reduced. At thismoment, the lateral MOS serves as both a component that can provide high electricalconductivity, and a terminal protection structure of the vertical MOS. This structure alsoprovides reference for the optimization of power semiconductor discrete devices.3. A practical approach is proposed and experimented to improve the yield ofOPTVLD products. OPTVLD technique is inherently sensitive to dose deviation. Theproposed approach can guarantee yield without compromising cost performance whentaking into the existence of actual process deflection.4. Based on OPTVLD theory, a new planar junction edge terminal technique isproposed. It is validated that the technique not only inherits the feature of highefficiency of OPTVLD theory, i.e. maximizing terminal sustaining-voltage withminimized terminal area, but also provides perfect terminal protection for power ICs, i.e.the available terminal sustaining-voltage can be as high as the breakdown voltage of theparallel planar junction based on the same substrate. Meanwhile, the process of thistechnique is compatible with common BiCMOS technique, and suitable for series ofsemiconductor devices with any sizes.
Keywords/Search Tags:power electronics, smart power ICs, power semiconductor devices, optimum variation lateral doping, planar junction edge termination
PDF Full Text Request
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