High-speed Image Storage System Technology Research Based On Power PC

With the fast development of photoelectric tracking measurement and remote sensing technology, high resolution, high frame frequency image sensor is widely used to improve spatial and temporal resolution, as well as the measurement precision of system. What’s more, in order to improve the detection capability of specific wavelengths, a number of different band image sensors are often deployed on one device. Thereby, real-time transmission and storage of high speed, huge amounts of image data has become an urgent problem. In bad environment, system requires temperature and strong earthquake resistance; and in aerospace and fast mobile applications, the miniaturization, lightweight and modular of the equipment must be implemented. Thus, on the premise of meeting the performance requirements, designing data storage system with small volume, light weight, standardization, good environmental performance, large capacity and high speed is one of the hot research areas, as well as the emphasis of this paper.In this paper, the implementation principle and advantages and disadvantages of current commonly used high-speed storage system are analyzed and studied in depth. High-speed storage system implemented in industrial computer has high speed, large capacity and big volume, but is quite heavy. On the other hand, the speed of storage system implemented in DDR is up to 1000 MB/s, but the capacity is too small, the data is lost when power supply drops. The storage system realized by the FPGA external SSD or NAND FLASH control chip has common speed and is difficult to use. for the NAND FLASH array storage system controlled directly by FPGA, the development is difficult, any change of the FLASH chip needs to be developed, and has fast speed, uses customer simple file system, has low export speed and simple serial communication, is difficult to control and ease of use.Aiming at the above problems, this paper proposes and implements high speed image storage system based on Power PC+FPGA+SSD minimization. First, the design of high speed storage system hardware platform is also implemented, and we set up a cross compiling environment and build a Linux system platform. Secondly, the high speed data transmission DMA controller base on PCIE is realized in FPGA. Thirdly, the control of the DMA high-speed data transmission is completed in Linux development, with applications to image data in the interface m SATA SSD in ext3 format. the size of the system is 22CM*10.9cm*4.1cm, and weighs only 303 g, thus realizing the miniaturization, lightweight and modular of high speed image storage system, and the technology of each module can be quickly used in other applications. Furthermore, the system is resistant to vibration and is fit to motion vector image collection and storage applications.Compared with NAND FLASH and NOR FLASH, Micro SD has large capacity, fast writing speed, and operating system and application updates are convenient. Thus it is important to study the boot sequence of Micro SD card. To address the boot problem of Power PC Micro SD card, this paper analyzes and studies the data structure of Micro SD MBR, the boot principle and sequence of Power PC, and proposes the method of directly reading and writing Micro SD card via shell, improving the reliability and efficiency of format the Micro SD card.PCIe interface to the DMA driver achieves the control of the DMA high-speed image data transmission and data storage control. to address the problem of traditional driving method that needs copy large amount of data from kernel space to user space leading to lower speed and large fluctuations, this paper proposes the driver implement method of kernel multi-threading and multistage double buffer. multi-threading in the driver completes data Ping-Pong buffer and file reading and writing directly, and all data operation is completed in kernel space, improving the writing speed of disk and stability, and storage speed increases from 60 MB/s to 100MB/s, which is close to the maximum writing speed of disk.Image real-time display and rapid export are very conducive to confirm the scene debugging and experimental data. Aiming at this requirement, this paper uses the cross-platform QT to implement the design of the user control program, only recompiling it can run under Windows and Linux. All data is transmitted through gigabit network, and control, status, read, display and FTP rapid export, and other functions are completed in the same control platform. Via the proposed method of sub-classing QObject, communication thread runs in a separate thread, improving the real-time response. After the test, the response speed of control program is fast, and the speed of FTP reaches more than 75 MB/s, showing 30 frames per second.In some applications, the output image code rate of high speed camera is higher. To improve the biggest record speed of the system, high-speed real-time image compression patent upon IP core based on improved JPEG2000 can be integrated within the FPGA, and when the compression ratio is 10, image PSNR can reach more than 35 d B, meeting the requirements of high precision positioning of the compression. The biggest record speed of the system can reach more than 1000 MB/s, meeting most of the high-speed storage applications.