Study On Test Of Crosstalk-induced Fault For High Speed Interconnects

As the rapid development of the circuit system toward the direction of scale maximization, technology-oriented minimization, operating speed high-speeding and clock frequency high-frequency, the circuit system has entered the era of high-speed circuit system. Interconnect lines in high-speed circuit have changed from the simple transmission characteristic to the transmission-line effect. Coupling noise impact on circuit transmission performance is increasing for interconnect lines. Prominent crosstalk noise has become a critical issue that cannot be ignored in high-speed interconnect circuit design and analysis. While crosstalk fault and its test pattern generation are important factors to ensure the quality and reliability of high-speed circuit products. The urgently needed to resolve these key issues is establishing an effective algorithm of test pattern generation for crosstalk faults. That is important to generate efficient test vectors, ensure a better fault coverage and reduce test time and cost. This paper studies the crosstalk fault and its methods of test pattern generation in high-speed interconnect circuits. Main achievements are summarized as follows:1. Basic principles of crosstalk-induced fault testing were presented. The principle of primary and secondary factors, the principle of effective aggress and the principle of symmetry for crosstalk-induced fault were proposed based on analysis of high-speed interconnect transmission line characteristics. That provided theory basis for crosstalk -induced fault testing.2. The incremental test model of crosstalk and test pattern generation algorithm for non-ideal interconnects were proposed.Three kinds of complex interconnect structure such as non-uniform¶llel, uniform&non-parallel and non-uniform&non-parallel were defined. Crosstalk characteristics and a simplified algorithm for non-ideal interconnects were studied. Testing of crosstalk-induced fault is implemented based on the orthogonal design and crosstalk principles above. This algorithm can reduce the number of test vectors and test time due to incremental stimulating method under fault coverage of 100%.3. A crosstalk fault test model called CFMC for complex topology interconnects was presented. For the complex topology structure in high-speed interconnect circuits, we have discussed crosstalk effects of L-shaped, U-shaped, serpentine interconnection topology structure and analyzed crosstalk characteristics of intercocnnect net including bi-directional, tri-state signal. The formal description of interconnect topology was defined through establishing the interconnection relationship matrix, which take the victim line as root node to construct classification tree of connection relationship. The logical aggressive line filtering method was studied. The crosstalk fault test model called CFMC for complex topology interconnects was established based on the incremental test model above. This algorithm solves the problem of huge test vectors and low test efficiency.4. An algorithm of test pattern generation called OCFAN was presented. Based on FAN algorithm, the aggressor line set of constraints were explored from the angle of the synthesis of physical structure and circuit logic. Taking the greatest aggressive time as the goal, crosstalk fault propagation and reverse push-back process were studied based on 11-valued logic and waveform sensitization technique. Two kinds of generation strategies such as static priority and dynamic priority were considered. An optimization model and time constraints of test pattern generation considering timing information was established. This algorithm can ensure fault activiation and transmitting so efficiency of ATPG is improved.