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Jitter Analysis For High Speed Serial Interconnects

Posted on:2010-02-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:L P LiFull Text:PDF
GTID:1118360275997728Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
For data rate has been increasing rapidly in modern electronic systems, high speed interconnects with even wider bandwidth are required more than ever. However, the traditional parallel interface technology became the bottleneck to improve the data rate. The high speed serial interconnects have replaced the parallel bus and been widely used in various fields because of its excellent advantage in data transmission. But one significant problem appearing in the serial interconnects is that jitter plays an important role in degrading the system performance. Reliable digital transmission requires minimizing jitter to a certain value. So it is studied and researched deeply in academic and engineering. The research fields mainly focus on jitter generating mechanism, controlling method, measurement, decomposition and analysis method. This dissertation mainly describes timing jitter in high-speed serial interconnects. The major contributions of this dissertation are summarized as follows:1. The capacitive and inductive coupling mechanisms between high speed interconnects are analyzed. The characteristics of crosstalk and its effect on timing are discussed. Investigation of the guard trace in decreasing crosstalk and improving the timing for coupled microstrip lines is performed. Structure of the guard trace and the proper distance between two grounded vias are analyzed and validated. The experiment results can be as a guideline for high speed interconnects design.2. Characteristics of the scattering parameters for two parallel microstrip lines are analyzed based on microwave network principle. Relation between the frequencies where crests and troughs occur in the insertion loss or the far-end crosstalk and propagating delays of odd- and even-modes, the parallel length is deduced. Combined with the spectrum of trapeziform pulse that commonly used in a digital system, effect of insertion loss on the transmitted signal is also studied. Finally the optimizing design rules for interconnects are presented to move troughs in insertion loss away from all important frequency ranges of interest for the transmitted signal, which can minimize the losses of higher frequency components and improve the interconnect performance.3. Based on mode decomposition of coupled transmission lines, the crosstalk induced jitter mechanism between the common single-ended and differential-ended coupled interconnects is analyzed. An improving circuit to reduce the crosstalk induced jitter is represented on the basis of the available equalization method. Another simple and valid circuit to recover the signals is also implemented, in which method, decision circuit to obtain the propagating modes is not needed, adders and delay units are used only to process the original receiving signals. Amplitude of crosstalk and crosstalk induced jitter are both alleviated, quality of the resulting signal and the system performance is improved remarkably. The presented method is both applicable for single-end and differential-ended interconnects, no matter with stimulus that having different voltage levels and data rates.4. Mechanism of data dependent jitter and principles of equalizer are analyzed. Based on the available methods, a new method to obtain contours of an eye diagram is presented. The pulse response of one high speed serial interconnect is employed to obtain the shortest and specific stimulus sequences which can structure the extreme conditions among the data stream, which can directly generate the contours of a complete eye diagram. Based on proposed method, the intersymbol interference induced jitter in the high speed serial interconnect can be estimated quickly.
Keywords/Search Tags:High Speed Serial Interconnect, Jitter, Crosstalk, Crosstalk Induced Jitter, Data Dependent Jitter
PDF Full Text Request
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