Research On The Design Methodology Of Application Specific Instruction-set Processors

As the rapid development of multimedia and communication techniques, higher performance is required to digital signal processors for the multimedia applications. In view of the future requirements, some researches and designs on the application-specific processors for the multimedia processing are given in this paper.In this paper, a new processor architecture based on the VLIW architecture is introduced. The configurable DSP core and specific function units are combined to design application-specific processors. This will reduce the time to market for multimedia processors effectively.What's more, to reduce the cost of register files in VLIW architecture, a new register file architecture named RFCC-VLIW is offered. A global register file is used to exchange data between different clusters. An analysis model is established to analyze the performance of the architecture. Results show that the costs of area, power and delay can be reduced effectively in RFCC-VLIW architecture.A verification approach is proposed for the processor architecture. Simulation-based method is used in this approach with the simulation vectors including determined vectors and random vectors. Determined vectors are written manually, which include some functions for the application and some vectors for the corners hard to verify. Random vectors are generated by the generic algorithm. Results show that the statement coverage can be achieved 99.9% with this verification approach.Two processors are accomplished based on the configurable architecture: THUASDSP2004 and THUMchip. Eight function units are implemented in THUASDSP2004 and eight instructions can be operated in parallel. THUASDSP2004 is fabricated under the 0.18um CMOS technique. The frequency can achieve 150MHz. THUMchip is a specific processor for H.263 standard aimed to video encoding and decoding. Some instructions and some specific function units are implemented to accelerate the processing.