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High-speed Data Transmission System Interface Circuit

Posted on:2004-06-02Degree:DoctorType:Dissertation
Country:ChinaCandidate:Z C TanFull Text:PDF
GTID:1118360092975019Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the information age coming, the data rate of data transmission system is increasing dramatically. But the increase of data rate is limited by band-limited transmission system, and higher the data rate is, more the limitation is. In order to use the bandwidth of transmission system high efficiently, and to decrease its cost, the high-powerful interface circuits——Line driver and Equalizer are necessary in high- speed data transmission system. Therefore this thesis focuses on the research and design of high-powerful interface circuits for Gigabit transceiver. The thesis is composed of 9 parts: the background, significance, main topics and innovations in the thesis are introduced in chapter 1; in chapter 2, the main function and performance of interface circuits are described from the view of system by using the example of Gigabit Ethernet's transceiver; the transmission media's frequency characteristics and model are analyzed for the high-speed data transmission system in chapter 3; the Line driver is presented in chapter 4; the equalization principles for high-speed data transmission system are introduced in chapter 5; a novel adaptive equalizer for 1000BASE-CX transceiver is presented in chapter 6; in chapter 7, a fixed equalizer for 2.5Gbps transceiver is described; in chapter 8, layout design and measured results are discussed; at last, the conclusions are drawn in chapter 9.During period of finishing the thesis, I read lots of literatures about the interface circuits in high-speed data transmission system, studied their principles and design techniques, and designed: 1,the Line driver for 2.5Gbps baseband copper cable transceiver; 2,the fixed equalizer for 2.5Gbps baseband copper cable transceiver; 3,the fixed equalizer for 1.5Gbps SATA (Serial AT Attachment) transceiver; 4,an adaptive equalizer for 1000BASE-CX transceiver. And I finished the layout design, chip test of Line driver and equalizer in 2.5Gbps baseband copper cable transceiver and equalizer in the 1.5Gbps SATA transceiver respectively.The main improvements and innovations in this thesis are as follows: 1,to design an analog equalizer tuned on-chip for 2.5Gbps baseband copper cable transceiver; 2,to present an adaptive equalizer for 1000BASE-CX transceiver; 3,to present an auto-gain control amplifier used in the adaptive equalizer for the 1000BASE-CX transceiver; 4,to present an adaptive continuous-time Gm-C filter in very high frequency for the adaptive equalizer for the 1000BASE-CX transceiver.
Keywords/Search Tags:high-speed data transmission system, interface circuits, Line driver, equalizer, adaptation, 2.5Gbps baseband copper cable transceiver, 1.5Gbps SATA transceiver, 1000BASE-CX transceiver, very high frequency, continuous-time Gm-C filter
PDF Full Text Request
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