A 5Gbps CML High Speed Serial Interface In 0.13μm CMOS Technology

CML (Current Mode Logic) high speed serial interface has several advantages, such as high speed, low noise, low power and low cost etc., so it is widely used in high speed serial transmission.Through researching the high speed transmission theory thoroughly, a 5 Gbps CML high speed serial interface has been designed and implemented by full custom design in a 0.13μm CMOS technology. The post-layout Hspice simulation indicates that the circuit works correctly, and all kinds of parameters achieve the initial high levels.The contribution of this thesis includs:1. Research the high speed transmission theory deeply, design and implement the CML high speed serial interface circuit.2. Adopt the active negative feedback and inductive-peaking technology in order to broaden bandwidth from 1GHz to 6GHz and realize the circuit working in 5Gbps operation, when designing the CML high speed serial interface.3. Design the equalizer for transmitter (pre-emphasis) and equalizer for receiver to alter the waveform due to low-pass response of the interconnect.4. Use the Limiting Amplifiers as the key part in the receiver of CML high speed serial interface circuit, which makes the sensitivity of input for the receiver reach 40 mV.5. Design a current inverter.Base on it, a new configuration of comparator is proposed, whose precision is up to 300 mV.6. Study the layout design of mixed signal ICs, then give matching and guard rings that all analog circuits in the layout need. As a result, many kinds of noise interference is reduced effectively. The post-layout simulation shows it works well.