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Study Of Readout Integrated Circuits For 320×256 MW/LW Dual-color IRFPAs

Posted on:2016-10-22Degree:DoctorType:Dissertation
Country:ChinaCandidate:J ZhouFull Text:PDF
GTID:1108330479482335Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Dual-color IR focal plane arrays(FPAs) is an important step towards multi-spectral detecting technology for 3rd IR FPAs. The research field of such kind of detectors, which can receive two-band IR radiation simultaneously and obtain information on targets’ spectrum and temperature that greatly improves the target identification capability, is becoming an advanced research hotspot. The realization of photo-signal accumulation and reading out depends on application specific integrated circuit(ASIC) which is based on micron or deep-submicron IC process.The research subject here is centered on readout integrated circuits(ROIC) for IR FPAs and the circuits have been designed based on the self-character of 320×256 simultaneous-readout middle-wave and long-wave(MW and LW) dual-color detectors. The design focuses on the following aspects. Firstly, every pixel on MW/LW FPAs contains two detecting structures for different wave band and their injection currents and dynamic output impedances differ from each other by several magnitudes. The design for LW injection structure should be carefully concerned on its injection efficiency due to its lower output dynamic impedance and larger photocurrent. Secondly, the performance of pixel circuit, including two injection structures, is largely limited by the pixel size of which the current center distance is commonly designed at the size of 30~50μm and will be further reduced in the future. A new pixel circuit structure is in urgent need of when considering the requirement of MW and LW integrating time and charge handling capacitance. Thirdly, tradeoffs and comparisons among speed, power consumption and performance is badly required during the process of ROIC design as the scale of FPAs reaches middle or large level. Above all, this research work is full of challenge and has a high project application value.The dual-color ROIC here is consist of four main circuit parts including photo-signal integration circuits, sampling and holding circuits, signal transferring chain and output stage. After comparing several commonly used circuit structures, direct injection(DI) structure is chosen for MW circuit. While buffered direct injection(BDI) is chosen for LW circuit. The buffered amplifier adopts such a new unilateral structure that it can be characterized as high gain, low power consumption, high stability and low noise, and is suit for cryogenic application. Then several works on theoretical derivations and simulations for these two structure’s performances such as injection efficiency, noise and frequency response, has been done. To obtain a larger charge handling capacitance in the limited pixel area, a new multi-capacitor sharing scheme is proposed in this article and in fact this innovation point gives an efficient way to this problem. According to the simulation results, the total charge handling capacitance reaches 70Me-/pixel. Finally, this circuit has been designed and manufactured under HHNEC 0.35μm 1P4 M CMOS process and also has been tested under both the room temperature and cryogenic environment coupled with the dual-color Hg Cd Te IR FPAs. According to the cryogenic testing results, the output swing of this circuit is 2.5V, the RMS noise is 0.5m V and the output dynamic range reaches 73 d B. The testing result shows that this circuit has a normal operation state, the performance fits to all the pre-set requirements and this chip satisfies requirement of MW and LW dual-color IR FPAs.According to the development trends of 30μm pixel MW and LW devices, this article proposed an improved pixel sharing scheme after referring to the former design of 320×256 dual-color ROIC and evaluation results. Based on the CSMC 0.18μm 1P6 M CMOS process, this pixel circuit has been designed and verified and the pixel layout has been carried out, in which the digital interference to analog circuit was well optimized. The simulation results shows that the total charge handling capacitance reaches 50Me-/pixel, the output swing of this circuit reaches 1.7V under 2.5MHz output speed and the nonlinearity is less than 0.01%.
Keywords/Search Tags:infrared focla plane arrays, readout circuit, dual-color, sharing, BDI
PDF Full Text Request
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