Design And Research Of Delta-sigma Capacitive-to-digital Converter With Low Power Consumption And Large Dynamic Range

In recent years,with the continuous development of biological implantable telemetry and wearable intelligent medical and environmental monitoring applications,the demand for large dynamic range capacitive sensors is increasing.However,both embedded and wearable applications require the signal detection system to have low power consumption characteristics.Therefore,the design of low-power and high-performance reading circuits adapted to capacitive sensors is of great significance.In this paper,based on a delta-sigma modulator,a low-power and large dynamic range second-order capacitance to digital converter（CDC）is designed,which realizes the direct digital conversion input with the maximum capacitance signal of 35p F.In this paper,firstly,the non-ideal system level model of delta-sigma modulator considering non-ideal factors is established by using MATLAB software.Through the analysis of the noise transfer function and stability coefficient,the gain coefficients at all levels of the modulator are determined.On this basis,the sensor C_x is used as the sampling capacitor of the first-order stage sampling capacitor of the modulator,and the equivalent input capacitance of the CDC is(C_x-C_DAC)driven by the inverse-phase excitation of the 4-bit compensation capacitor C_DAC and C_x,thus reducing the requirements of the first-order circuit on the operational amplifier.Chopping technology is used to reduce the input offset voltage of the operational amplifier in the first-order integrator,and finally,a low-power,high-resolution CDC design is achieved.At the end of the text,Verilog is used to implement a digital filter adapted to the CDC to test the resolution of CDC to C_x.The CDC adopts SMIC 0.18μm CMOS process to complete the circuit design,with a chip area of 1950×1200μm².The power supply voltage of the circuit is 1.2V,and the overall power consumption is 30μW.The on-chip clock signal with the frequency of 16k Hz and 8k Hz is realized.Where,16k Hz is the sampling signal frequency of CDC,and 8k Hz is the chopper signal frequency.The FFT simulation results of the CDC show that it has delta-sigma noise-shaping characteristics.When the conversion time is 16ms,the resolution is 1.85f F,the measurement range of C_x is 0～35p F,and the digital filter output achieves good linearity with the change of C_x.