Research And Design Of Ultra Low Power Wake Up Receiver In Wireless Sensor Networks

In recent years,wireless sensing technology has been widely used in various fields of daily production and life.In order to enhance the stability of wireless sensing systems,the design process must consider the optimization of sensor node lifetime,which is usually performed by reducing the node power consumption.Previous reports have mostly used sleep timer-based techniques to achieve lower power consumption by controlling the duty cycle of the receiver,but the high communication latency due to the demanding accuracy requirements limits its application.Later,the technique based on ultra-low power wake-up receivers strongly overcomes this drawback.This technique enables sensor nodes to respond to communication requests accurately and in a timely manner by adding a continuously operating wake-up receiver to a sleeping radio.During the design of the wake-up receiver,the problem of power consumption should be strictly controlled.In recent years,the receiver architecture with envelope detector front is often used in related researches,which achieves ultra lower power consumption of only n W level,but its reception sensitivity is vulnerable to the system thermal noise.Moreover,the receiver sensitivity performance of such wake-up receivers under the wireless general-purpose band of 433 MHz in the current research is not satisfactory.Therefore,this paper proposes an ultra-low power wake-up receiver for wireless sensor networks.First,to address the problems of the current envelope detector design,a multi-stage envelope detector with gate bias is proposed to improve the output signal-to-noise ratio of the envelope detector,thus improving the sensitivity of the wake-up receiver;in addition,a voltage controlled delay line with low-pass filtering is set in the baseband circuit to further improve the sensitivity of the wake-up receiver by optimizing the baseband noise;finally,to ensure the system stability,an offset calibration loop is also added.In this paper,the work is organized and described as follows:（1）A multi-stage envelope detector with gate bias is proposed,and by adjusting its bias voltage,it is able to adjust its input resistance under the condition of maintaining a constant envelope detector conversion gain.This structure can effectively improve the output signal-to-noise ratio of the envelope detector,thus improving the sensitivity of the wake-up receiver.To optimize the noise performance of the pre-sampling signal,a voltage controlled delay line with low-pass characteristics is added at the front end of the receiver’s comparator to filter out the high frequency noise in the baseband circuit while performing the voltage-to-time signal conversion.A delay unit is added to the output of the voltage controlled delay line to ensure the accurate operation of the comparator circuit.Since a DC offset is generated in the baseband circuit,an offset calibration loop is added to the system,and when an offset is generated in the circuit,the calibration loop will eliminate the offset voltage by working periodically,thus ensuring the stability of the system.（2）Based on the proposed envelope detector,a wake-up receiver circuit is designed using a 65nm process,and the 434MHz carrier is modulated by On-Off Keying（OOK）modulation to send wake-up commands and transmit data at 100bps.The simulation results show that when the wake-up receiver receives the wake-up command,it can send the wake-up signal accurately.The power consumption of the whole wake-up receiver is15.6n W under 0.4V supply voltage,and the sensitivity of-71d Bm is achieved under the condition that the leakage detection rate is less than 10^-3and the false alarm rate is less than1/h.