Research And Implementation Of High-precision And Wide Dynamic Delay Module In Channel Simulato

With the development of the Fifth Generation(5G)communication technology,new challenges have emerged: the ultra-high frequency characteristics of 5G communication not only put forward higher requirements for signal delay resolution,but also increased delay expansion due to the increase in its paths.However,the delay accuracy that existing simulation instruments can achieve is insufficient to meet the needs of 5G communication and even newer generation communication systems;Moreover,the number of channels and paths in the 5G channel model has greatly improved compared to the previous ones,posing a significant challenge to the resource consumption of the channel simulator.However,the traditional methods to achieve wide dynamic delay are no longer sufficient to meet the requirements of the channel simulator in the 5G communication context.In summary,it is necessary to further improve the delay accuracy and wide dynamic delay range of the channel simulator under the premise of low resource consumption.This article focuses on how to improve the delay accuracy and wide dynamic delay range of the simulator.(1)Implementation of high-precision delay function of channel simulator.Aiming at the problem that the delay accuracy in existing channel simulators is insufficient to meet the development needs of current and future communication systems,a design method for implementing a high-precision delay module based on linear phase Farrow architecture filter banks is proposed.The filter coefficients of the sub filters of this module are symmetric,so that nearly half of the resource consumption can be saved inside the filter;At the same time,due to its linear phase and wider bandwidth compared to other high-precision delay filters,this module can achieve higher delay accuracy compared to other filters.In addition,this module will be implemented in a Field Programmable Gate Array(FPGA),and the results show that the proposed module design method has high feasibility.(2)An implementation method for improving the wide dynamic delay range in a channel simulator with limited hardware resources.Due to the increase in the number of antennas in the communication system,hardware resources are strained,and multipath signals lead to an increase in the maximum delay expansion.To address the deepening contradiction between wide dynamic delay and scarce hardware resources,a module that can achieve wide dynamic delay under resource constraints is designed.By downsampling the input signal of the register,the amount of data that needs to be stored in the register is reduced,To ensure that a wider delay can be achieved with the same hardware resources,thereby improving the wide dynamic delay range;However,the above process brings with it the problem of insufficient signal accuracy,so it is necessary to restore the delayed signal with as high accuracy as possible.The most crucial aspect of this method is to construct a high-precision,low resource consumption sampling rate conversion filter.Based on the performance and implementation cost analysis in the article,a method of integer decimation/interpolation using multi-level filters and highprecision interpolation using linear phase Farrow architecture filter banks is proposed to complete high-precision arbitrary factor sampling rate conversion.At the same time,the hardware implementation of the proposed structure is carried out in the article,and the results can prove the correctness and feasibility of the theory.This article conducts in-depth research on channel simulators with low resource consumption,high accuracy delay,and wide dynamic delay range,and proposes solutions to some technical problems encountered in their development process.This has certain reference value for the research and optimization of some functions of channel simulators.