Research On Rare Earth High-k Gate Dielectric For The Performance Enhancement Of Graphene Field Effect Transistor

Graphene’s extremely high carrier mobility and excellent mechanical strength and thermal conductivity make it one of the candidate materials for transistor channel layers in the post-silicon era.However,the current performance of graphene field-effect transistors（GFETs）is far from the theoretical value.On the one hand,the impurities and folds introduced by the CVD growth process cause the deterioration of graphene performance,on the other hand,the dielectric constant of traditional SiO₂ substrates is low,and the impurities and phonon scattering at the interface reduce the mobility of graphene.At present,it has been proved that the GFET performance can be improved by high-k dielectric and h-BN as substrate materials,owing to the good lattice matching between h-BN and graphene and the good electric field control ability of high-k dielectric.Compared with the complex preparation and transfer process of h-BN,the growth of high-k dielectric can be realized by a variety of thin film deposition technologies,and the performance of GFET can be regulated by optimizing the process parameters.Based on the aforementioned fact,this thesis uses magnetron sputtering to form a ternary oxide HfLaO by combining HfO₂ with rare earth element La,on the basis of which a bottom-gate GFET is prepared.The main contents are as follows:1.Preparation,optimization and device verification of high-performance high-k dielectric.The basic physical properties of the materials were studied,and the device verification was carried out by capacitors and IGZO TFT with stable performance.HfLaO films were deposited on Si substrates by co-sputtering between HfO₂ target and La target,and the properties of high-k dielectric were optimized by the regulation of rare earth element La ratio and post-deposition annealing process,and the material characterization results showed that with the increase of La element ratio,the oxygen vacancies and hygroscopicity of HfLaO increased.The incorporation of La increased the crystallization temperature from 400℃ to 500℃,and the optical band gap from 5.6 eV to 5.83 eV.When the post-deposition annealing temperature is 200℃,the surface of the film is the smoothest.The electrical test results of the capacitor and TFT show that the optimal La ratio and annealing temperature range is 60%and 200℃ to 300℃,respectively,when the dielectric constant of HfLaO reaches 16.4 to 18.9,and the leakage current density is as low as 1.8×10^-7 A/cm².Besides,the mobility of TFT devices reaches 12 cm²V^-1s^-1 with minimal hysteresis effect.2.Integration of high-performance high-k dielectric on GFET and research on device characteristics.The CVD-grown graphene was transferred onto the HfLaO film by PMMA-assisted transfer method,and GFET was prepared by photolithography and reactive ion etching.The influence of different process parameters of HfLaO on GFET was studied:the moderate proportion of La elements increased the dielectric constant,which caused the Dirac point to decrease and the mobility increased,but a relatively high proportion of La elements would lead to deterioration of device performance.The increase in post-deposition annealing temperature leads to a decrease in mobility and an increase in the Dirac point;When the post-depositon annealing time is short,the hysteresis effect of GFET is greater.The Dirac point of GFET prepared by HfLaO optimal process conditions was as low as 3.1 V,and the hole and electron mobility were 2230cm²V^-1s^-1 and 1780 cm²V^-1s^-1,respectively.Besides,the hole and electron current switching ratios were 7.7 and 4.4,respectively.This research provides a technical and theoretical basis for the subsequent research of graphene-based FET devices.