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Fabrication Of Graphene Field Effect Transitors On Si Substrate

Posted on:2014-04-10Degree:MasterType:Thesis
Country:ChinaCandidate:W PanFull Text:PDF
GTID:2268330422464716Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the development of microelectronic processing technology, silicon-basedintegrated circuits is becoming increasingly close to its physical and material limits, to findthe alternative material of Si for integrated circuits turns to be a hot topic in this community.Because of the outstanding electrical properties of graphene, it is predicted as one of themost promising material that can replace Si. Benefited from the high carrier mobility, thegraphene field effect transistor (FET) can work at much higher frequency than traditional Simetal-oxide-semiconductor FETs.In this thesis, chemical vapor deposition(CVD)-grown graphene on copper is used as theFET channels and the fabrication process is systematically studied. First, three different wettransferring methods to transfer CVD grown graphene from metal substrate to oxidizedsilicon wafer was compared. The technique by spin-coating a PMMA layer is the best inour experiments. Raman spectrum of our transferred graphene presents a film less than4layers with limited defeats.Then the fabrication process of graphene FETs with micron scale channel is studied,SiO2and HfO2are used as dielectric layers for dual-gated graphene FETs. Photolithography,lift-off, reactive ionic etching(RIE), electron beam evaporation and magnetron sputteringtechnologies are adopted. Current-voltage measurements of our obtained FETs show thatthe Dirac voltage (VDirac) is affected by the dielectric constant of the gate, e.g., FETs withSiO2as dielectric layer have VDirachigher than20V while those with HfO2have lower VDiracbetween2.2V to3V (the electron mobility of devices is between3000cm2/Vs to4500cm2/Vs and carrier concentration is1.9×1011cm-2). Our FETs demonstrated a trend tomake Graphene FETs P-type doped by impurities introduced in the fabrication procedure.Annealing can significantly modulates FET’s VDiracthrough reduction of the impurities inthe channel, e.g. the concentration was decreased from beyond4×1012cm-2to below2.5×1012cm-2. The experimental results of this thesis give a solid fundamental to furtherimprove the characteristics of graphene FETs.
Keywords/Search Tags:CVD, graphene, graphene FET, Dirac Voltage
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