Research On Key Technologies Of Gate Drive Circuit Of Enhanced GaN Power Device

GaN as a third generation semiconductor is rapidly becoming a substitute for some power devices.GaN based power devices have been widely used in power electronic systems because of their excellent switching rate,breakdown voltage,current density and other properties,providing more efficient solutions for electronic systems.Not only that,it enhances the capabilities of today’s 5G networks and facilitates the development of new technologies such as lidar and high-power wireless charging.So GaN transistor as a power switch,the application and research of its gate drive circuit is of great significance.However,with the development of GaN grid driver circuit towards high frequency applications,its circuit indicators are also faced with the following challenges:(1)signal logic error caused by high dv/dt and misopening of external power devices.(2)Matchability and other problems caused by transmission delay in high-voltage application.In this thesis,a 48 V enhanced GaN HEMT grid driver based on 0.18μm BCD process is designed.According to the chip design index and application requirements,the overall framework and topology structure of the chip are presented.Based on the characteristics of the enhanced GaN device,the functional requirements of each module and the circuit design are determined.Independent and symmetrical input signal channels of high side and low side are adopted,and the input signal is shaped to remove the burr on its amplitude,so as to improve the signal matching of high and low side.In the chip structure,bootstrap capacitor power supply is used to solve the power supply problem of high side power rail.In addition,the reasons for the functional problems caused by dv/dt in high frequency transmission are analyzed and expounded.Based on the idea of auxiliary charging when the power supply is floating,the level shift circuit with cross-coupling structure is improved to achieve 50V/ns dv/dt immunity.And the current comparison is used to assist the control of output reversal,so that the chip signal transmission delay is reduced.In addition,the undervoltage detection function is added in the chip function safety.The undervoltage used in this thesis is different from the undervoltage detection of the traditional comparator structure,and its structure can be used to detect whether the voltage between the floating power supply and the floating ground is sufficient,which improves the safety factor of the chip.In this thesis,the principle analysis and function simulation of the module used in the design circuit are carried out,and the chip layout design and matters needing attention are introduced.Finally,the parasitic parameters of the layout are extracted to simulate the function of the chip,and the following circuit design indexes are achieved: 1.Typical signal transmission delay is less than 20 ns.2.The typical application frequency is 5 Hz.3.Discrete output stage,source current driving capacity 1.5A,submerged current driving capacity 4A.4.When HS floats to 50V/ns,the chip can still run normally.