| With the increasing demand of transient response,volume weight and power density in power electronic system,power converter with high operation frequency has become the focus of academic and industrial.Gallium Nitride High Electron Mobility Transistors with advantages of fast switching and low conduction loss,allowing power converter to support much higher switching frequency and contributing to the reduction of passive components,is given more attention as a promising candidate of conventional silicon-based power devices.However,faster switching speed of GaN HEMTs leads to larger gate oscillation,higher dv/dt values and increasing proportion of freewheeling losses,which brings new challenges to the design of gate drive circuits.To address the above problems,high speed and reliable gate drive technology of GaN HEMT is researched systemically in this paper,including high-speed and high-voltage level shifting technology,high-speed and reliable output driving technology and adaptive and predictive dead-time control technology.The proposed design is fabricated by CSMC high and low voltage compatible BCD process.The main works and innovations concluded as follows:The causes of common mode transient noise and its affection mechanism on system and chip are discussed.Aiming at the problems of operating frequency of gate driver circuit is limited due to the long filtering delay in traditional level shifter,a three-branch high voltage level shifter has been studied.To accurately replicated the common mode current caused by dv/dt,the auxiliary branch adopts the same structure as the main branch except for an alwaysoff LV transistor.The copied current is then mirrored into dv/dt transient stress filter for dynamically compensation without increasing transmission delay.Experimental results demonstrate the proposed level shifter have a high dv/dt immunity larger than 100 V/ns when the transmission delay is less than 25 ns.Aiming at the problems such as dv/dt noise and gate overshoot caused by fast switching of GaN HEMT,segmented output driving control strategy has been proposed.dv/dt noise and gate overshoot can be inhibited effectively without increasing too much turn-on time and turnon losses.Based on segmented output driving control strategy,a double NMOS dynamic output driving circuit has been proposed.Combining the area advantage of NMOS pull-up,the amplitude of dv/dt can be controlled independently with proposed circuit by decreasing the gate charging current during miller plateau period.Compared to conventional open-loop gate driver,switching loss are reduced by 16.2% for the same reduction effect of dv/dt.Aiming at the problems that the freewheeling loss increases due to the large reverse conduction voltage drop of GaN HEMT during high-frequency operation,the optimal dead time requirements for the rising and falling edges of switching node are analyzed taking synchronous buck topology system as an example.On the basis of the above analysis,an adaptive and predictive dead-time control technology is proposed to achieve nearly optimal zero-voltage switching.Both the detection delay and the transmission delay can be compensated through the dead-time control loop.Compared with the conventional gate driver with fixed dead-time,the proposed gate driver improves the efficiency in a wide load range.The test results proved that the efficiency improvement has a maximum of 8.1% under light load conditions.Finally,based on the above innovative circuit research results,a half-bridge GaN gate driver is fabricated by CSMC high and low voltage compatible BCD process.The dynamic and static parameters of the circuit have been simulated and tested.The experimental results are consistent with the theoretical analysis.The proposed structure effectively improves the reliability and efficiency of GaN-based power system,and has good engineering application value. |
