Design Of Passive Mixer For Anti-blocking Receiver

In the past few decades,wireless communication devices have proliferated,making the current spectrum increasingly crowded,which poses a huge challenge to the anti-blocking ability of receivers.The down-conversion mixer is the core module in the receiver system,and its performance directly determines the lower limit of the whole system.Therefore,it is important to study the down-conversion mixer with anti-blocking function.This thesis proposes a mixer for anti-blocking receiver based on 22 nm CMOS process.The mixer designed in this paper mainly includes passive mixing switch circuit,four-phase clock circuit,baseband switched capacitor array and baseband amplifier circuit with DC offset.The passive mixer switch circuit and the baseband switched capacitor array form an impedance transfer network with bandwidth re-configurability,which makes the anti-blocking function flexible.The four-phase clock circuit provides a square-wave local oscillator signal with a duty cycle of 25%,improving the performance of the overall down-conversion mixer.The baseband amplifier circuit provides gain while DC offset by means of negative feedback to prevent DC deviation from affecting the overall receiver operation.The circuit design,pre-simulation,layout design and post-simulation are presented.The post-simulation results show that in the2.4～5.3GHz operating frequency,under 1V power supply voltage and TT craft corner,the baseband bandwidth can be switched between 10 MHz and 50 MHz,the voltage conversion gain is greater than 18.3d B,the double-sideband noise figure is less than 12.2d B,and the input1 d B compression point is greater than-24.3d Bm,the anti-blocking rejection ratio is greater than 20.2d B at the frequency deviation of 400 MHz,and the working current is less than 6.2m A.The down-conversion mixer designed in this thesis meets the design requirements and can be applied to zero-IF receivers with anti-blocking requirements.