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The Design Of A Mixer-first Antiblocking Radio Frequency Front End

Posted on:2022-10-23Degree:MasterType:Thesis
Country:ChinaCandidate:S JiangFull Text:PDF
GTID:2518306740993479Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the promotion of Internet of Things applications,the number of smart terminals has exploded,making the ISM frequency band more and more crowded,and the risk of signal blockage has greatly increased.The requirement of RF receivers' blocking suppression has become higher and higher,and the Mixer-first structure can compete with traditional receivers in terms of noise figure and impedance matching.Therefore,it is extremely important to study the anti-blocking RF front-end of the Mixer-first structure..A Mixer-first anti-blocking RF front-end circuit is designed in this paper.The research background of Mixer-first RF front-end circuit is introduced,and the current research status of Mixer-first RF front-end at home and abroad is analyzed.Then design indicators is established according to domestic and foreign research indicators.Several main structures of anti-blocking RF front-end and anti-blocking application requirements are compared and analyzed,and the overall framework of the system is determined to be the RF front-end circuit with a passive mixer followed by a transimpedance amplifier.In order to enhance the anti-blocking ability of the circuit,a local capacitance positive feedback path is used to form high-order impedance.The out-of-band linearity of the circuit will also be affected by the design of the passive mixer,and a global negative feedback path is added to increase the design freedom,so that the out-of-band linearity can be optimized by designing the size of the cpassive mixer.In order to offset the noise of the main path and the feedback path,a noise elimination path is added.The mixer clock circuit in this article adopts the structure based on the current mode master-slave latch,the output is local oscillator signal with 2.4GHz,the local oscillator signal has four phases,the duty cycle is 25%,and does not overlap each other.The thesis designed The circuit diagram and layout are designed based on TSMC 40 nm process in this paper,and pre-simulation and post-simulation are carried out.Under 1.2V power supply voltage,postsimulation results show that the gain of the RF front-end is 20.2d B,the noise figure is 6.9d B,and the out-ofband IIP3 at 80 MHz frequency offset is 31.87 d Bm,meeting the application requirements of high linearity and anti-blocking.
Keywords/Search Tags:RF front-end circuit, Mixer-first, anti-blocking, high linearity
PDF Full Text Request
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