Research On On-chip Memory For Uncooled Infrared Detector

In recent years,my country has shown a rapid development trend in infrared imaging technology.Uncooled infrared technology has been widely used in military,security,industry,medical,electric power and other fields.With the continuous improvement of the technical level of uncooled infrared detectors,uncooled infrared detectors continue to develop in the direction of larger arrays,higher sensitivity,faster response speed,and higher integration.Since the off-chip memory is integrated on the circuit board of the uncooled infrared detector,it is susceptible to noise interference,while the on-chip memory is less susceptible to noise interference,has higher stability,and can directly transmit information such as stored frame data and temperature data to the DSP /FPGA,speed up image output of uncooled infrared detectors.Therefore,this paper takes the uncooled infrared detector of 640×480 array scale,17 μm×17μm pixel size,14-bit resolution,TSMC 0.18 μm process as the research background,and researches and designs the on-chip memory used for the detector,designed a capacity of 3.5 K bit memory.The following are the main research contents of this paper:(1)Due to the simple circuit structure of the traditional six-transistor bit cell,the read static noise margin and the write static noise margin cannot be improved at the same time,so the traditional six-transistor bit cell has low stability.In order to improve this problem,this paper improves the circuit structure of the bit cell,analyzes the circuit structure and working principle of the existing bit cell,and designs a new eight-transistor bit cell.Using TSMC 0.18 μm process for simulation verification,the stability is improved by 32%～173%.Under the condition of 3.3 V voltage,the hold static noise margin is 1.1446 V,the read static noise margin is 1.126 V,and the write static noise margin is 1.438 V.(2)Research on the sensitive amplifier of the key circuit of the memory,and design a two-stage cascaded sensitive amplifier for the purpose of reducing the delay of the sensitive amplifier by analyzing the working principle and circuit structure of the existing sensitive amplifier.The simulation results show that the power consumption of the new sensitive amplifier is 230 μW,the deviation of offset voltage is 10.57 m V,and the delay time is 325.19 ps,which is 34.33% lower than that of the traditional sensitive amplifier.(3)The memory is used to store the image data and temperature data of the readout circuit of the uncooled infrared detector.It is designed to output 14 bits each time.Because in this paper,the design of new eight-transistor bit cell consists of two control line to read and write operations of storage units,more than six-transistor bit cell in comparison with a control line,traditional decoder does not match with,aiming at the problems in the decoder after adding two word line control circuit,and at the same time will be off chip clock is designed to read and write two internal clock.This paper completes circuit design and simulation based on TSMC 0.18 μm1P6M process,and finally designs a memory with a capacity of 3.5 K bits.The memory consumes 14.61 m W at a clock frequency of 100 MHz.The overall layout area is 614.5 μm×411.7 μm.