Research On Real-Time Encoding And Decoding Technology In High-Speed Optical Communication System

Polar code is a new coding technique based on the channel polarization,which has a fixed coding structure,lower computational complexity,and can be proven to reach the channel capacity theoretically.The emergence of polar code has epoch-making significance on the study of channel coding.In order to apply polar code to real-time high-speed optical communication systems,this paper investigates the hardware implementation of a high-throughput parallelized codec on a Xilinx xcvu13p-flga2577-1-e FPGA chip,based on an in-depth study of the channel polarization principle with encoding and decoding algorithms of polar code.The real-time verification of the encoder is completed.The decoder is applied to a 15GBaud-QPSK optical communication system to improve the system performance and a real-time optical transmission experiment is completed.The main research contents of the paper are as follows:1.The encoding algorithm of polar code is introduced,and Gaussian approximation(GA)is selected as the method for reliability estimation of polarization channel in this paper.Then the hardware architecture of the parallelized encoder,with its key modules is elaborated.The encoder can achieve a throughput rate of 39.86Gbps at a maximum clock frequency of 155.7MHz,with less than 1/10 of the available hardware resources of the FPGA chip.2.The principles of decoding algorithms are described,including successive cancellation(SC)and cyclic redundancy check codes aided successive cancellation list(CA-SCL).In order to explore the performance of different decoding algorithms,an additive white Gaussian noise(AWGN)simulation platform is established based on MATLAB,from which the CA-SCL algorithm with the best performance is finally adopted.Meanwhile,the effects of code length,code rate and list width on the performance of the decoder are also verified.Then,a simulation platform of the satellite-ground laser communication system with polar code is built.The simulation results illustrate that the CA-SCL algorithm with a path width of 2 can effectively combat the signal fading caused by atmospheric turbulence in the satellite-ground laser link.3.This paper investigates the hardware implementation of a parallelized CA-SCL decoder with 256 code length and various coding rates.First,the top-level hardware architecture of the decoder is demonstrated,and a parallel pipelined decoding scheme is introduced to improve the throughput rate.To address the problem of increasing BRAM resources caused by the soft information computation unit in the decoder,this paper simplifies the implementation of soft-decision based on the QPSK mapping rules and the butterfly structure of SCL algorithm.Compared with the traditional soft-decision method,the decoder with the improved soft-decision method maintains the excellent error correction performance of polar code while reducing the amount of hardware resources.4.A back-to-back optical reception experiment of 15GBuad-QPSK based on polar code is conducted in this paper.The off-line experimental results show that at BER=1E-3,the polar code with coding rate 1/2,2/3 and 4/5 obtain 6.8dB,4.2dB and 3.2dB of coding gain respectively compared with the hard decision.The real-time transmission results present that the polar code with coding rates 1/2,2/3 and 4/5 can achieve error-free transmission when the received optical power is higher than45.5dBm.The maximum clock frequency supported by the decoder is 127.1MHz,which accounts for less than 1/4 of the total chip resources.