Real-time Multi-object Detection And Tracking Algorithm Based On FPGA

In recent years,multi-object detection and tracking algorithms based on convolutional neural networks have been widely used,and important results have been achieved in the fields of traffic monitoring,attitude detection,missile monitoring,etc.At the same time,with the advent of the Internet of Everything era,mobile intelligent terminals are gradually integrated into people’s lives.A large number of researchers have begun to apply deep convolutional neural networks to embedded systems.However,the convolutional network requires a large amount of computation and memory access,and requires high power consumption and resource utilization.Some commonly used hardware implementation platforms such as CPU,GPU,and ASIC are difficult to meet the requirements,which makes the application of the network in mobile and intelligent terminal equipment restricted.FPGA has high parallelism and.low power consumption,and is more suitable for hardware acceleration of embedded convolutional networks.Therefore,this paper studies a real-time multiobject detection and tracking algorithm based on FPGA.The main work is as follows:(1)A detection and tracking fusion algorithm suitable for embedded is proposed.The algorithm is aimed at the problems of repeated feature extraction,computational redundancy and ID conversion between targets with similar trajectories that exist in traditional detection-based multitarget tracking algorithms.Optimize the network structure and cascade matching,integrate the feature extraction network of the tracking algorithm into the backbone network of the detection algorithm,add the detected class information to the cascade matching of the tracking algorithm,and finally perform operator fusion and quantification on the fused network..The experimental results show that the quantized fusion algorithm proposed in this paper has less computational complexity,faster speed than the current popular multi-target tracking algorithms,and is more suitable for embedded scenarios such as FPGA.(2)Aiming at the implementation of the optimized detection and tracking fusion algorithm proposed in this paper on the FPGA hardware platform,a pipeline-based,multi-channel parallel computing FPGA hardware acceleration scheme is proposed.This scheme is based on the structural characteristics of convolutional networks.obtain parameters and images in real time through Ethernet and store them in external memory,design the internal data input buffer as a ping-pong operation of data multiplexing,convolution is a multi-channel parallel loop calculation,and the parallel output can be directly accumulated without a large-area cache.The experimental results show that the implementation effect of the detection and tracking algorithm on the hardware platform is basically same as that of the software,and the power consumption is lower and the resource utilization rate is higher,which meet the resource utilization and power consumption requirements of deep convolutional neural networks in embedded application scenarios.