| The Multi-channel Ionization Chamber(MIC)is a detector for measuring the beam position and profile uniformity of the accelerator terminal,which is characterized by a large number of channels,a weak signal and a fast response.So it is necessary to develop a specific front-end electronics and data acquisition system.The current DAQ system is based on the NI PXIe chassis and Flex RIO boards,There are problems such as large volume and inconvenient secondary development.With the miniaturization and integration of Heavy Ion Medical Machine(HIMM),and upgrade to front-end electronics,the DAQ system does not meet the needs very well.Therefore,this paper develops a new DAQ system hardware circuit based on Zynq.According to the output signal characteristics of the front-end electronic,integration requirements and functions that need to be implemented.The hardware circuit is divided into ADC acquisition module,high-speed digital IO module and data processing module.In order to balance design flexibility and system integration,the FMC structure is used between the modules.The ADC acquisition card support 16 channels and 60MS/s synchronous acquisition,It Includes signal conditioning,Clock generation,power supply and HPC interface,to complete the functions of analog-to-digital conversion.The high-speed digital IO card adopts a commercial bidirectional 5-way IO card with an LPC interface.Completes the Information exchange with front-end electronics.The main chip of the data processing module is the XC7z100 in the Zynq family,configure and control daughter cards through logical programming,port the Linux operating system on the processor side,complete the reading of the digital signal and sending the data to the host computer via Gigabit Ethernet.The carrier board is designed with a 33.333 MHz,50MHz single-ended system clock,At the same time,125 MHz,156.25 MHz and 200 MHz differential clocks are designed to match different data bandwidth.In order to effectively control the power-up sequence,a power supply management network is designed.In addition,the DDR3 memory unit and JTAG,SFP,Ethernet and other interfaces are also designed in the carrier board.Finally,the hardware circuit was tested for system integration.The test results are as follows,The power deviation is less than 0.9%,Analog input range is 2Vpp,The analog bandwidth is 102 MHz,The ENOB is around 10 bits,ADC dynamic performance is good,crosstalk suppression is greater than 65 d B,the phase consistency is 0.16°,the noise to ground is 0.20836 m V.In the beam simulation test,the non-linearity error of the channel output is less than 0.72%,with the input current range is 0~100n A.The specifications of the hardware circuit have reached the design expectations,It can meet the needs of the Multi-channel Ionization Chamber data acquisition systems. |