Hash Algorithm Accelerator Based On FPGA

With the continuous development of China’s economy and society,the information construction is becoming more and more perfect.It is worth paying attention to ensure the integrity and security of information in the transmission process.With its unidirectional,weak anti-collision and strong anti-collision characteristics,hash algorithm plays an important role in the field of information security such as encryption and decryption,digital signature and password authentication.The increasing diversity of application scenarios makes the hash algorithm need to be continuously updated,and the requirements for algorithm performance are also improving.The hash algorithm is mainly implemented by software and hardware.The software method can not meet the performance requirements of the algorithm.In the hardware mode,the hash algorithm implemented by using ASIC can meet the requirements of performance and power consumption,but the circuit structure can not be expanded,the algorithm needs to be redesigned when updating,and the update maintainability is poor.As a semi custom circuit,FPGA can give full play to the advantages of special hardware architecture to improve computing energy efficiency on the one hand,and can make full use of its advantages of hardware reconfiguration to improve the flexibility of the system on the other hand.If a general acceleration scheme of hash algorithm on FPGA is designed,it can not only improve the performance of the algorithm,but also reduce the difficulty of algorithm update and maintenance,which can meet the needs of hash algorithm in practical application.This paper proposes a design of a general-purpose accelerator for the hash algorithm using a full pipeline structure,and implements it based on the FPGA heterogeneous computing platform.The main work and achievements of the paper are summarized as follows:First,a full pipeline structure of hash algorithm is designed.Firstly,different hash algorithms are implemented in software and the calculation time of each part of the algorithm is tested,and the performance bottleneck of the hash algorithm is determined.Then,by analyzing the algorithm structure and aiming at the performance bottleneck,the full pipeline structure of hash algorithm is designed by using the methods of shortening calculation path,precomputation and look-up table method.Finally,by analyzing the hardware structure characteristics of FPGA,the data storage structure is optimized.It provides a theoretical basis for the subsequent design of the general accelerator of hash algorithm.Second,a general accelerator for hashing algorithms is designed and implemented.The hardware acceleration module of the accelerator uses the full pipeline structure of hash algorithm,which is implemented by OpenCL on FPGA and optimizes the memory allocation and data reading and writing.The accelerator realizes the acceleration of different hash algorithms through FPGA reconfiguration.Combined with the characteristics of OpenCL heterogeneous computing,it optimizes the mapping of computing tasks on FPGA and the data transmission between CPU and FPGA.In the experiment,five commonly used hash algorithms were selected for optimization.The clock frequency of the implemented hardware circuit was about 370MHz,and the algorithm performance also reached about 370 MHash·s^-1.The performance of the algorithms has improved significantly.Thirdly,the heterogeneous reconfigurable acceleration system of hash algorithm is realized.A CPU+FPGA heterogeneous computing platform based on OpenCL is built,and the acceleration system is implemented in the computing platform.Through multi-thread management,command queue management and load balancing design,the CPU can flexibly use the general accelerator of the hash algorithm through software to improve the computing efficiency of the accelerator.Compared with the hash algorithm implemented on Intel Core i7-10700 CPU and NVIDIA GTX 1650 super GPU,the experimental results show that the reconstruction time of the algorithm is about 180 ms,and the five algorithms achieve higher computing performance and energy efficiency than CPU and GPU.For SHA-256 algorithm,the computing system achieves 18.7 times performance improvement and 34 times energy efficiency improvement than CPU,2 times performance improvement and 5.6 times energy efficiency improvement than GPU.