Real-time Hardware Task’s Schedule And Management Of Heterogeneous Computing Multi-node System Based On FPGA Accelerated

With the increase of single processor’s speed and development of network technology,the application areas of computer becomes more and more expanded and heterogeneouscomputing systems in real life and work has been widely used. Real-time hardware taskschedule and resource management is the key problems of heterogeneous computing systems.The goal of heterogeneous computing real-time hardware task’s schedule is thattrying to reduce the process time of the whole system for the realization of a certainperformance index under the premise of constraint conditions. The proposed heterogeneouscomputing system in this paper is based on FPGA accelerated multi-node system. Thehardware real-time task’s schedule is divided into global system schedule and target processnode local schedule. The paper puts forward BFBOFF algorithm that it has higherperformance than Best-Fit algorithm in the global system schedule. In the target process nodelocal schedule, the paper puts forward AIBFA algorithm that is based on the principle ofmaximum avoid invasion. We can prove that the BFBOFF algorithm reduces the average timeload rate of global system schedule and the AIBFA algorithm reduces rejected rate oftarget process node local schedule through the simulated experimen.In this paper, the research of FPGA resources management in the target processnode includes finding a series of maximal free rectangles and placing all tasks in the FPGA.The Efficient strategies of FPGA idle resources management plays a very important role.This paper introduces an efficient algorithm to find a series of maximal free rectangles basedon one-way stack. The algorithm uses different M value in and out of one-way stack to findall maximal free rectangles. We use simulation experiments to simulate the algorithm.theresults show that the this algorithm improves the performance of searching complete freeresources. The placement of hardware tasks in FPGA is similar to the placement of softwaretasks in computer memory. The resources fragments may be more and more in the FPGA withthe task of hardware placed, which seriously affects the overall performance of the system,This paper introduces an TDSADA algorithm to reduce the resources fragments rate in FPGA.