Design Of UHF Passive Radar Receiver And Hardware Implement Of Signal Processing Modules

Passive radar(PR)is a new system radar that do not emit any signal of its own and simply listen to other electromagnetic emitters.PRs have low cost,little electromagnetic pollution and strong anti-strike ability.there are many types of Radio Frequence(RF)signals can be used by PRs,include FM,digital television broadcasting,mobile phones,Wi-Fi and so on.Among various radiation sources,digital television broadcasting signals have become the focus of domestic and overseas research because of their high transmission power,wide coverage and high popularity.However,due to the large bandwidth of the TV signal and the large number of receiving antenna array units,higher requirements are imposed on the data acquisition performance of the receiver system.Based on the domestic digital television broadcasting signals,this paper studies and designs a passive radar receiving system,including analog and digital parts.The analog part uses a superheterodyne receiver,which has the advantages of high sensitivity and large dynamic range.The digital part is controlled by a field programmable gate array(FPGA)device,and performs functions such as sampling,digital down conversion,and data transmission.To simplify the circuit design,the JESD204 B protocol is used as the data transmission interface between the ADC and FPGA.Data transmission adopts 10GBASE-R protocol.Compared with customized PCIE boards,it has the advantages of high stability,good compatibility and low cost.Its bidirectional transmission rate can reach 10 Gbps.This paper first introduces the research status of passive radar under digital broadcasting signals,and then gives the basic equations and general signal processing methods of digital TV broadcasting passive radar.On this basis,the detailed design of the entire radar receiver system is given,which focuses on the design of the digital part.Then,the functions of each module of the digital acquisition system are tested,and the UAV detection experiment is carried out using the radar,and the effectiveness of the system is verified by the measured data.Finally,the hardware implementation of the extended cancellation algorithm ECA-B and ambiguity function is studied.The synthesis and test results show that the implement of ECA-B and ambiguity function based on FPGA is feasible.