Research On Key Technologies Of RF Microsystem Based On Silicon-Based 3D Heterogeneous Integration

Active phased array technology has been widely used in military and civilian fields such as target detection,navigation and positioning,mobile communication,etc.As the core of active phased array system,the performance,volume and cost of RF module directly determine the application prospect of phased array system.With the development of silicon based MEMS and TSV technology,3D heterogeneous integrated micro-system technology has become an important direction of the next generation of highly integrated electronic system technology.In the field of active phased array,the application of this technology can realize the three-dimensional integration of heterogeneous RF chips,passive transmission structures and antenna arrays,and high-performance airtight packaging.In this paper,combined with the actual process development experience,TSV etching process,TSV filling process,TSV back exposed copper process,RDL plating process,temporary bonding process and wafer level eutectic bonding process were optimized.On this basis,a microsystem structure with multilayer silicon switching plates stacked is designed,and the technology scheme of silicon switching plates and microsystem assembly is proposed.In this paper,a RF interconnection model library is designed and established for the proposed multilayer stacking structure of Microsystems.The interconnection models include linear transmission model,arc corner model and longitudinal transmission model.The above models are simulated and optimized in 0-40 GHz frequency band using HFSS software.In this paper,an RF microsystem with vertically stacked multi-layer RF chips is developed to verify the above technological scheme and model library,and to form a prototype of the design method and principle.Based on the above purpose,a K-band four-channel transmitting microsystem is developed in this paper,and the key RF interconnection structure of the system is simulated and optimized based on the model library.The heat dissipation process of high power chips in 3D heterogeneous integrated structure is analyzed,and the heat dissipation effect of stacked structure is evaluated.The stress and deformation induced by thermal effect in microsystem are analyzed.The method of silicon through hole partition is used to suppress the crosstalk between signals.The cavity structure is optimized to avoid resonance in the working frequency band.The test results of the system show that the saturation output power of the transmitting channel is greater than 21.5 dBm and the phase shift error of the transmitted RMS is less than 5 degrees in the frequency range of 25-27 GHz,which meets the expected requirements.The overall size of the system is 8.1mm × 8.7mm × 1.2mm,and the weight is only 0.2 g.The experimental results show that the proposed microsystem process scheme and model library can be used for the design of Microsystems in the 0-40 GHz frequency band.Compared with other advanced tile-type transceiver components,the size and weight of the proposed silicon microsystem can be greatly reduced in size and weght,and achieve low cost,mass production and assembly.