High-current And High-performance LDO Design Based On NMO

Low voltage differential linear regulator（LDO）is a kind of power supply chip.It is widely used in various industries because of its stable and reliable power conversion ability,which can provide power for precision electronic equipment.LDO using NMOS as a power transistor has a smaller chip area,which can better reduce chip manufacturing costs,and is a hot topic of current research.However,LDO using NMOS power transistor is easy to be limited by the input voltage range,usually with a high pressure difference,so that the efficiency is very low.Internal charge pump boost is employed to remove this restriction,but it will also cause problems such as excessive output ripple and insufficient driving capacity,which is difficult to meet the needs of high-end electronic equipment.Therefore,it is of practical significance to improve the deficiency and performance of LDO using NMOS power transistor.This project mainly focuses on the design and research of NMOS LDO with low noise,high power rejection ratio,fast transient response and large current output.In order to reduce the noise of LDO,a low noise bandgap voltage reference with a low-pass filter and a low noise error amplifier with a bipolar junction transistor preamplifier stage are designed.In order to improve the PSRR of LDO,a power ripple suppression circuit is designed,and a pre-regulated circuit is designed for the band-gap voltage reference.In order to improve the transient response of LDO,a high drive capacity buffer stage with dual loops is designed.In addition,the transient response enhancement circuit is designed to further suppress the overshoot and undershoot voltages.In order to achieve high current output and reduce the manufacturing cost of the chip,NMOS is used as the power transistor.In order to eliminate the input voltage limitation caused by using NMOS as power transistor,a high stability RC oscillator and charge pump are designed.In order to reduce the output voltage ripple of LDO with charge pump module,the AC and DC signals in the negative feedback loop of LDO are isolated,and a gate voltage controller of power transistor is designed.In order to improve the reliability of LDO,the over temperature protection circuit and over current protection circuit are designed.Based on Hua Hong 0.35μm CMOS technology and Cadence IC617 platform,the front-end circuit design and back-end layout design of each module circuit of LDO are completed.Simulation results show that LDO can achieve a large current output of 3A with a minimum low voltage difference of 110 mV.The PSRR of LDO under light load is:111.261 dB@DC,86.9005 dB@1kHz,78.9472 dB@1MHz.The PSRR under heavy load is:111.28 dB@DC,84.1231 dB@1kHz,39.2638 dB@1MHz.The output voltage ripple is approximately 833 nV.The undershoot voltage and recovery time caused by switching between light and heavy loads are 22 mV and 48.3μs respectively,and the overshoot voltage and recovery time are 19 mV and 59μs respectively.The output integral noise of 10 Hz～100 kHz is 78.51μV_rms.The designed LDO has good performance and is expected to be applied to fields such as portable devices,embedded systems,and systems on chip.