Design Of High Current DDR Voltage Regulator Circuit

With the rapid development of semiconductor process technology,the mass production of the5 nm process has now been achieved,which enables the rapid development of memory technology in the direction of miniaturization and high integration.Low operating voltage,low static power consumption,high current,etc.have also become urgent problems to be solved for supplying power to a double-rate synchronous dynamic random access memory(Double Data Rate,DDR)chip.According to the power supply requirements of different DDR chips,consider choosing a low-dropout linear regulator(LDO)with a smaller chip area,lower quiescent current and output of high-quality output voltage without output voltage ripple,but traditional LDO regulators cannot meet the power supply requirements.Therefore,on the basis of the traditional LDO voltage regulator,a linear terminal voltage regulator with bidirectional load current is obtained.This voltage regulator with both discharge and absorption capability can not only provide a stable output voltage for DDR,but also output and absorbs large ampere currents.In this paper,a DDR terminal linear regulator with both spit and sink capability is designed.The regulator is powered by dual power supply voltages,which can not only provide stable output voltage,but also output and absorb large currents of ampere level,which solves the problem of traditional LDO only.The problem of outputting but not absorbing large current can meet the power supply requirements of DDRⅠ/Ⅱ/Ⅲ and low-power DDRⅢ/Ⅳ bus terminals.The internal error amplifier adopts the design of rail-to-rail input structure,which expands the input common-mode voltage range of the regulator;at the same time,it adopts the design of translinear loop circuit structure and simple compensation circuit structure,so that it can provide fast load when the load changes suddenly.Transient response to reduce output overshoot.The upper and lower power tubes of the output stage adopt NMOS push-pull output,which not only saves the layout area,but also provides a large current of 1A/2A/3A,which greatly improves the load capacity of the voltage regulator.In addition,a voltage buffer is also designed to provide a flexible reference voltage for the error amplifier;an over-current protection circuit,an over-temperature protection circuit and an under-voltage lockout circuit are designed to protect the chip from being damaged in harsh conditions;The inrush current protection circuit ensures that the output terminal will not generate inrush current and damage the capacitor.The voltage regulator chip in this paper is designed based on Hua Hong’s 0.35μm CMOS process,and the Cadence software is used for simulation verification.The simulation results meet the design specifications,and the overall circuit layout design is completed.The tape-out chip is tested.When the input power supply voltage VIN is 5V and the power tube input voltage VLDOIN is 2.5V,the output voltage is stable at 1.25 V and can output/absorb 1A/2A/3A load current;the load current suddenly changes from 0A to 3A The output overshoot voltage is less than 300 m V;it can work normally in the temperature range of-45～160℃,other protection circuits can work normally,and meet the design requirements.The designed chip can meet the requirements of DDRⅠ/Ⅱ/Ⅲ and low Power consumption requirements of DDRⅢ/Ⅳ chips for power supply.