Design And FPGA Impmentation Of Signal Processing System For Shipborne Radar

In recent years,our country’s shipbuilding industry has developed by leaps and bounds,and its market share has been increasing year by year in the world.At the same time,the demand for its supporting radar navigation equipment has also been increasing.It can be seen that our research on the localization of shipborne radar is of great significance.Relying on a certain shipborne radar pre-research project,this paper gives its parameters and indicators according to the actual scene needs and completes the design of the radar signal processing system.A set of hardware systems with FPGA and DSP as the core is designed and completed on the constructed hardware system.Design and test of digital logic on FPGA side.The main research content and completed work of this paper are mainly divided into the following parts:Firstly,the principle knowledge involved in the process of radar preprocessing is introduced in detail,and the band-pass sampling theorem of intermediate frequency sampling from the analog domain is analyzed.And combined with simulation analysis.Then use MATLAB to simulate the preprocessing algorithm,and make full preparations for the subsequent system design and implementation.Then according to the actual application scenarios,the basic parameters of the shipborne radar are designed.According to the parameters,the average power of the radar is calculated and the maximum unambiguous distance and pulse repetition frequency are analyzed.Then completed the radar’s transmitting timing scheme and receiving timing scheme under different working modes(different ranging ranges),and gave the repetition frequency design to understand the speed ambiguity,and analyzed the amount of data processed by the hardware according to the receiving timing.Finally,the overall structure of the radar signal processing system is designed,the connection interface of the hardware module of the signal processing part is given,the communication protocol of the signal processing system part is formulated,and the resource division of the real-time algorithm on the hardware device is determined.Then design the hardware system,and design a set of hardware platform with FPGA+DSP as the core according to the project requirements.The characteristics and resources of the core chip FPGA and DSP are described,and then the ADC intermediate frequency sampling module,storage module,internal and external interface modules of the board,power supply module,clock module,etc.are designed respectively,and the chip selection and circuit design are completed.Finally,the logic design of the system FPGA side is completed,and the configuration and function verification of the external chip ADC16DV160 are completed.The protocol implementation of EMIF,SRIO and UART on the FPGA side is completed,and the overall system communication module rate matching design is completed.On the FPGA side,the generation and conversion design of the radar multi-mode transmission timing and receiving timing is completed.According to the generated timing sequence,the real-time processing process is simulated,and DDC,FIR low-pass filtering,7 times Frequency-domain pulse compression for decimation,parallel long and short pulses.The mean error between the FPGA pulse compression results and the quantized MATLAB pulse compression results is0.00088.Finally,the distance gate splicing of long and short pulses is completed by means of a state machine.The system designed in this paper can complete the signal preprocessing of the shipborne radar in different ranging modes,and can realize the command transmission and analysis of each part according to the communication protocol of the signal processing module,which is of great significance to the construction of the shipborne radar real-time signal processing platform.