Design Of Data Storage And Hardware Co-processing Module Based On DDR3

With the continuous development of modern electronic technology,the signal bandwidth and data volume are getting larger and larger.In order to better capture and analyze the accidental events in high-speed analog signals,digital oscilloscopes are required to have high sampling rate,large storage depth,and high trigger rate.and more efficient and practical waveform processing methods.This thesis builds a highperformance digital storage system based on a 20 GSPS oscilloscope with "multiFPGA+DDR3" architecture.The sequential sampling mode based on segmented storage ensures the system storage depth,waveform trigger rate and storage space utilization.In addition,this thesis studies and improves the hardware co-processing module of largecapacity data,adopts the waveform search method based on correlation coefficient,and the peak extraction method based on bitonic sorting,which optimizes the FPGA area and improves the efficiency and practicality of waveform processing.It meets the user's personalized and intelligent data processing needs.The main research contents of this thesis are as follows:1.This thesis builds a complete storage control system with efficient trigger control,segment control,and link transmission control through hierarchical design.While ensuring 4Gpts large-capacity data storage under 20 GSPS,the sequential sampling mode based on segmented storage is realized.The maximum number of waveform segments can reach 65536 segments,which reduces the waveform trigger dead time to between 40 and 100 ns within a period of time.Multi-frame valid waveform.In addition,according to different functions and bandwidths,this thesis encapsulates and designs modules at different levels,which reduces the coupling between modules and improves the stability of the storage system.In addition,this thesis makes reasonable use of pipeline,parallel processing,FIFO multi-stage back pressure and other technologies in data link transmission and bit width conversion to ensure the integrity and efficiency of data transmission.2.Design and implement the waveform search hardware co-processing module.By analyzing the waveform data throughput,this thesis designs a new waveform search state machine control logic,which can complete the 1Gpts sampling point traversal within200 ms,the search accuracy is 50 ps,and the maximum number of feature point marks is50,000,which ensures the high efficiency and high efficiency of the search function.Precision and great range.In addition,this thesis also realizes the edge search function of pure numbers,studies the correlation search method based on correlation coefficient,and analyzes and designs the feature judgment logic and algorithm in detail.Among them,the correlation search mode performs waveform matching by calculating the correlation coefficient between the reference waveform and the waveform to be tested,which has good applicability and provides a new solution for the oscilloscope hardware to realize sequence,frequency,pulse width and other search methods.3.An efficient peak extraction co-processing module for parallel data is implemented.In this thesis,the existing peak extraction module is redesigned through the analysis of parallel data extraction at equal intervals,and the peak detection link based on the dual tone sorting algorithm is implemented by analyzing and using hardware logic.Compared with the original peak extraction method,this scheme avoids the conversion of the number of channels,reduces the consumption of LUTs and Registers by 18% and23% respectively,and expands the arbitrariness of the extraction coefficient.