Design,Characteristics And Relibility Of 1700V SiC MOSFET

Due to the rapid development of the integrated circuit industry and the high efficiency requirements of power electronic power systems,the third-generation semiconductors（wide-bandgap semiconductors）,typically represented by silicon carbide（SiC）,have attracted widespread attention.Because of its excellent material properties,SiC power devices can work under high temperature,high pressure,and high frequency conditions.Compared with traditional silicon-based devices,SiC power devices have lower power loss,which can significantly improve transmission efficiency and reduce chip area.At present,foreign medium and low voltage SiC MOSFET devices have been successfully commercialized,but domestic SiC MOSFET devices are still in the stage of small batch verification.For SiC MOSFET devices,the quality of the gate oxide induces a number of reliability issues.The high density of states at the SiC/Si O2 interface causes the threshold voltage to be unstable.An increase in the threshold voltage will increase the conduction loss of the device,and a decrease in the threshold voltage can easily lead to false turn-on of the device.Therefore,it is of great significance to carry out research on the reliability of SiC MOSFET devices.This thesis mainly designs a planar 1700V SiC MOSFET.Based on the domestic silicon carbide power device manufacturing platform,the tape-out experiment is carried out,and the dynamic and static characteristics of the device samples are tested and analyzed,and the threshold voltage bias temperature instability（Bias Temperature Instability,BTI）method preliminarily evaluated the device gate oxide reliability.Firstly,based on the Silvaco TCAD simulation platform,the structure of the planar1700V SiC MOSFET device was designed and optimized.Combined with the theoretical formula,the thickness of the N-type drift region of the device was calculated to be 15μm and the doping concentration was 6×10¹⁵cm^-3.Combined with the actual processing capability,two groups of implantation conditions of Pbase region are determined.The peak concentration of Pbase region is 1×10¹⁸cm^-3,and the surface doping concentration is 1×10¹⁶cm^-3.Under the above two groups of implantation conditions,the doping concentration of the JFET region and the width of the JFET region were respectively biased,and the doping concentration of the JFET region was determined to be 1×10¹⁶cm^-3,and the width of the JFET region was 2.0μm,2.2μm,and 2.4μm.The influence of the gate oxide charge on the static electrical parameters of the device is studied,and the switching characteristics and UIS characteristics are simulated and analyzed.In the design of the terminal structure,the grouping method of the multi-zone gradually-varying spacing field limiting rings and the effect of the initial ring spacing on the device breakdown voltage and lateral electric field distribution are mainly studied.The breakdown voltage is 2148V and the terminal efficiency is 97%.The device layout was designed according to the simulation parameters,and the tape-out experiment was completed.Secondly,the dynamic and static test analysis of the 1700V SiC MOSFET tape-out sample was carried out.The threshold voltage of the tape-out sample was 3.4V,the specific on-resistance was 8.7mΩ·cm~2,and the reverse breakdown voltage was 1990V.The sample input capacitance,output capacitance,and transfer capacitance are 3.41n F,127p F,and 22.7p F in sequence.The turn-on time of the sample is about 200ns,and the turn-on loss is 44m J/cm~2;the turn-off time is about 100ns,and the turn-off loss is22m J/cm~2.The avalanche voltage of the sample is 2350V,and the single avalanche energy is 1.2J/cm~2.A final preliminary test evaluates the threshold voltage stability of the SiC MOSFET devices.When the temperature is 175°C,the threshold voltage drops to 2.1V.The DC＿BTI test of the device found that the threshold voltage increased by 0.5V after 1 hour of positive gate compressive stress;the threshold voltage decreased by 0.4V after 1 hour of negative gate compressive stress.By building the bias temperature instability（AC＿BTI）test platform under dynamic gate voltage,the AC＿BTI experimental study of 1700V SiC MOSFET samples was carried out.The results showed that the threshold voltage of the device increased by 0.6V after 11 hours of dynamic gate stress.