Adaptive Voltage Scaling System Design Based On Dynamic Self-calibration Tunable Replica Critical Paths

Integrated circuits are developing rapidly in the direction of very large scale.Meanwhile,people have put forward higher requirements for low-power design.Affected by variation in process,voltage,temperature and aging,traditional design methods usually reserve large voltage margin to ensure that the chip still meets the timing under the worst-case condition,which results in a great waste of power.The adaptive voltage scaling(AVS)can adjust the voltage flexibly according to the actual conditions and reduce or even completely eliminate the reserved margin.The existing indirect monitoring based AVS technology have the following problems that impair power gains:(1)The monitoring unit is unable to strike a balance between low cost and high robustness;(2)The design process of the tunable replica critical path(TRCP)is cumbersome;(3)The calibration error between the TRCP and critical paths under wide voltage range is relatively high.Thus,a set of AVS technology based on dynamic selfcalibration TRCP is proposed in this thesis,the main research contents are as follows:(1)A timing monitoring unit that combines static and dynamic logic is proposed to feed back the timing information of the chip,and then is optimized by adjusting the size and threshold voltage of transistors.It can work stably over a large voltage range of 0.5V to 0.9V while having relatively little area and power cost.(2)An automated design method for TRCP based on genetic algorithms is developed,which simplifies the design process.This method also reduces area and power of TRCP.(3)A dynamic self-calibration system for TRCP,which is composed of time division multiplexing time to digital converter and critical path activation controller,is designed.The self-calibration system performs dynamic calibration according to the actual conditions of each chip and achieves a minor error with critical paths.(4)The above technology is applied to a neural network accelerator to construct an indirect monitoring based AVS system under TSMC 28 nm process.Post simulation results show that the maximum error between TRCP and critical paths can be reduced to 1.9% across over wide voltage range.As compared to the design with reserved margin,AVS technology achieves 21.2%?68.4% power improvement at 0.35V?0.9V.The minimum energy per operation is only 8.2p J/cycle,and the entire area overhead is only 0.65%.Furthermore,frequency adjustment improves the system's performance gains by 15.6%?388%.Therefore,the technology proposed in this thesis can accurately monitor the timing and decrease the voltage to close to the theoretical minimum value under wide voltage range,which achieves large power improvements.