Design And Implementation Of NVMe Controller Based On Zynq

The rapid development of information technology has led to an explosive increasement of the data volume.Various applications require better data storage performance and processing capabilities.The traditional storage technology using the SATA or the SAS interface could hardly meet the current application requirements.Solid state drives based on Peripheral Component Interconnect Express interface and supporting Non-Volatile Memory Express standard protocol are currently the most representative of storage performance,which are mainly used in PCs and data centers.In NVMe applications on FPGAs,software drivers are usually used for reading or writing.However,in this method,the low execution efficiency of drivers would result in the insufficient usage of storage performance of NVMe.When the available NVMe soft IP is used to replace the software driver,the execution efficiency can be improved due to the parallelism of hardware logic.But there are still problems such as high price and insufficient flexibility.In view of the above problems,this subject designs and implements a high-efficiency and flexible NVMe controller in RTL,according to the actual project development requirements.This design conforms to the NVMe 1.3d protocol standard and implements the whole NVMe instruction control process.The NVMe controller in this paper is divided into two parts: the hardware logic design and the software program design.Among them,the hardware logic part mainly includes the instruction processing,the data flow conversion,the queue management,the Round-Robin arbiter,the doorbell information control,the instruction submission or completion reception and the error detection.The software program part mainly includes the PCIe bare metal driver and the NVMe control program.When the controller are working,the bare-metal driver and control program would load fisrtly for the initialization process.The process includes PCIe bus configuration space mapping,device enumeration,link training,creation of I/O queues,mode selection and the configuration of SSD registers.Then,the hardware logic part completes the control process of NVMe instructions.The NVMe controller designed in this paper supports multiple types of NVMe instructions such as reading,writing,identifying,refreshing,and getting log page.Moreover,because the NVMe controller adopts a multi-queue management mechanism,it supports parallel execution of up to 256 instructions.Thus,the transmission performance is greatly improved.In addition,the NVMe controller has error detection capabilities.When an error is found,the error detection module would return the error status code and the status code type.Meanwhile the controller supports input and ouput data in two forms: the data stream and the address mapping,which meets the requirement of seamless connection.In conclution,the controller achieves high-speed data transmission and large-capacity storage in applications of image data.The simulation verification and the board-level testing show that the NVMe controller designed and implemented in this subject could complete multiple types of NVMe instruction.The controller could improve instruction execution efficiency and storage performance.On this basis,the system design is completed based on FPGA.According to the actual testing,the highest write speed could reach 2873 MBps,and the highest read speed could reach 3081 MBps.The NVMe controller designed in this paper meets the needs of the project and has a certain practical value for engineering applications.