Design On The Controller Of NVMe Interface Based On FPGA

Solid State Storage technologies is highly valued because of its small size and high reliability. In recent years, with the popularity of solid state drives(also known as flash disk) for civil use, solid-state storage technology has made a great progress and completely replaced Winchester hard drives in the aeronautics and space engineering. PCIe(Peripheral Component Interconnect Express), a high-speed serial computer expansion bus standard, have the widest application in today's computer systems, from embedded systems to high performance servers.NVM Express(NVMe) is an optimized register interface created for PCIe based SSDs. The goal if NVMe is to deliver the full performance capabilities of current and next generation nonvolatile memory, supporting at least a 10 year life of the interface, while standardizing the PCIe SSD interface to enable broad ecosystem support. [1]This article focuses on research and implementation of NVMe interface controller and firstly introduces the current situation of data storage devices and the background of this project. As well as the necessity of advance research on the FPGA based NVMe interface controller. Then analysis the performance and implementation difficulties of both the NVMe protocol and the PCI Express bus, particularly detailed analysis and working principle of NVMe. The third part was about the benefits of So C design and Zynq-7000 which was used in the project, also with the new development environment and design supporting as well. The last part was the implementation of the NVMe interface controller, starting with how to implement a fully functional PCIe Endpoint on the Programmable Logic area of Zynq-7000, ending with how to implement NVMe interface controlling process on the ARM core of Zynq-7000.The design of NVMe interface controller in this paper was simple structuring and easy to extend to future upgrades or re-development.