Research On Integration Characteristics Of Chalcogenide Selector And Phase Change Memory

With the advantages of high density,high reliability,and fast programming speed,threedimensional phase change memory(3D PCM)is highly anticipated in the application of Storage Class memory.However,with the expansion of the array scale,the leakage current and power consumption are also increasing,The two-terminal selector is integrated with the phase change memory cell to suppress the leakage current.As a new selector with the most excellent integration characteristics with PCM at present,OTS(Ovonic Threshold Switch)selectors also have many types.Selectors with different performance being integrated with PCM can lead to diversity of integrated characteristics and also unlimited possibilities for innovation in operating schemes.To solve the above problems,this research designed and prepared the OTS and PCM integrated cell,built a compact model of OTS and PCM in Hspice,proposed a read operation scheme and a write operation scheme and verified through simulation and experiment,and the main work is as follows:Firstly,the preparation process parameters were optimized,and the integrated cells with simple stacking and bottom electrode interconnection were respectively prepared,all of which can realize the read,write and erase operation,and a self-aligned pillar integrated cell structure was designed and prepared.Secondly,a compact model of the OTS cell and PCM cell was built,and the DC and pulse characteristics were simulated and verified,and the influence of different parameter match on the integrated characteristics was studied.There is a trade-off between Vth(OTS)and the operating window.Under a specific parameter matching condition,as the voltage increases,the voltage continues to increase after the OTS is turned on,and then the PCM is turned on,Which can significantly increase the read operation window,which is verified by experiments to increase the read window from 0.22 V to 0.48 V.Finally,a stepped write pulse is designed.The two stages of steps realize the opening process and the write operation process respectively.The lower-power crystallization pulse keeps the cell temperature within the effective crystallization temperature,which can speed up the operation and reduce the power consumption.In Hspice simulation,at least a 56.5%increase in operating speed was achieved.During experimental verification,the operating parameters of OTS were optimized.Finally,compared with the traditional trapezoidal write pulse,the operating time of the new write pulse was reduced from 430 ns to 230 ns,The speed is increased by 46.5%,which greatly increases the operating speed.