Research On SPICE Modeling And Operation Scheme Of 3D Phase Change Memory Cell

Phase change memory is regarded as a strong competitor of next-generation nonvolatile semiconductor memories.Compared with the existing storage technology,there are many advantages:non-volatile,high storage density,low power consumption,fast reading and writing speed,multi-value storage,etc.In order to meet the requirements of massive data in the era of big data,phase change memory needs to further increase its storage density,and a three-dimensional stacking technology similar to FLASH can be used to develop into a three-dimensional phase change memory.However,the current research on three-dimensional phase change memory still has problems such as complicated fabrication process and optimization of operation schemes.The content of this paper aims to analyze the existing operation scheme and propose the suitable operation schemes for three-dimensional phase change memory.In this paper,we first establish an HSPICE model of the three-dimensional phase change memory OTS+PCM cell,which can simulate the DC and erase and write processes of the three-dimensional phase change memory OTS+PCM cell.The HSPICE model can be used to study the operation scheme and provide a reference for the design of the peripheral circuit.Then we simulate the three-dimensional phase change memory OTS+PCM cell and analyzes the operation schemes under 2 different situations when the OTS+PCM cell has different OTS layers and other structural materials remain unchanged,a new type of operation scheme is proposed for read and erase operations.This stepped pulse can reduce power consumption and increases erasing speed.Moreover,in view of the small reading margin of the sub-threshold reading scheme,a solution to improve the reading margin by using a peripheral circuit is proposed.The continuous change of the cell resistance is achieved by using the current pulse amplitude,width,and the falling edge or the low pulse width and amplitude of the stepped voltage pulse,so as to realize the writing of cell multi-value storage..And for the multi-value reading problem of OTS+PCM cell,the reading scheme proposed in Chapter 3 is adopted to read the OTS + PCM cell resistance,and the 3-state reading is realized.